From nobody Fri Jul 24 04:35:13 2026 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4h5wC606s3z6lsRW for ; Fri, 24 Jul 2026 04:35:14 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "YR1" (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id 4h5wC53dcTz3Zdy for ; Fri, 24 Jul 2026 04:35:13 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1784867713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=7Tlvs1neRPz4HPR0r5MrytsqQkYX48+AEdx4PVP8joI=; b=dA3U32GDlx8C3zxXT/A6rNbg4NHNOHeNedsGtuNE5QL/Cxbk+nSIkfaPHzsEqt99mxZWw2 8WVdsJ/IQm8liQNvilZSRQKZXu9LmCkz6vWa8am5AjI3SRh+BmPonLZ/44SJw/f0QyZS1/ 3Nl2SogjgZ+GHQqaGFwI9vc4pbs/Sjnb1V6IcdwJGaPVZljk917SCExQwMIk8asn866hb4 ecuSisdG8vaWN3aMygvakqaA99THVRNPR5pfmSh1usQp0Gr7esPEoUsZPzXXma5/ImyzFJ 08gCvS5+9bhCmHM0uNXMLhKMQgQTYOTM49bSVkcfAXZC9TMyBlyjh+yVACFxyg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1784867713; a=rsa-sha256; cv=none; b=XC1sRh9fCuBBUJoAJSHz3Qu0GFZR67zaBBpZ7JHfS2I6Snv1mUJECWiiMkw7bPKsJLcojq 691ZXmSdlkE6tnSPtT6iZ6fzMm77dqV59LeDcQ3D7tOFcacFubvPpY36DV2fVOW/PF4t1f sG1lLabnjlJ2IGJUMIe8hrt1H1YOvspIR7BTmwnnepT7fgHr9jWU4ygYt69evzlGQXvBbI 5Pj9zmRbzVFpJSsqQYakLp7e9KoNFGGojcC6WPtsaOEHg0AzTqAz+l7cmBDJZOv0A7vCT8 BQ9Qj2OA2uXw1YeK21cNljkVaeje+LN0AiPARuwIJGxhBoOWH0pEtaZPWbq9DQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1784867713; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=7Tlvs1neRPz4HPR0r5MrytsqQkYX48+AEdx4PVP8joI=; b=PwP/X6KBS90CR3EF14CBDRZREjTUN/duroQQyPcK++yi2Js3BSWdfs5uX/x/kjZ23xzZrQ PQnD2uSy8eocWQmAAIIV9Cz6EP55Z7iOpQgYEb5dVsMbumUJKnCXwMGCShvHKUqFDF1qOt AKHewAbvO7cSVxkBfeCwaQ8nd0ojp5gfJeUqXu16WsKeZR1ZkAqdGNgXjUxQVwhYbb0kRw wBwjJ5RVI0YLMwF0mM85CrTVjcNRTP2b0A248OagloTHL043jiTAG+JpIgUlXNjSHZZwHK DytHcCc3bPsIGni36rWL82ECk8SOQWmC3l30hIF7Vamaj/WeFERe35K7fq9YZw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4h5wC52g2TzcTg for ; Fri, 24 Jul 2026 04:35:13 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 385e1 by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Fri, 24 Jul 2026 04:35:13 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Olivier Certner Subject: git: 45254c2df093 - stable/15 - x86/local_apic.c: Fiddle with thermal LVT slot only if supported List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org List-Id: List-Post: List-Help: List-Subscribe: List-Unsubscribe: List-Owner: Precedence: list MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: olce X-Git-Repository: src X-Git-Refname: refs/heads/stable/15 X-Git-Reftype: branch X-Git-Commit: 45254c2df093617dfd22336d177b4aece317699c Auto-Submitted: auto-generated Date: Fri, 24 Jul 2026 04:35:13 +0000 Message-Id: <6a62eb81.385e1.1c5c480b@gitrepo.freebsd.org> The branch stable/15 has been updated by olce: URL: https://cgit.FreeBSD.org/src/commit/?id=45254c2df093617dfd22336d177b4aece317699c commit 45254c2df093617dfd22336d177b4aece317699c Author: Olivier Certner AuthorDate: 2026-07-02 14:26:21 +0000 Commit: Olivier Certner CommitDate: 2026-07-24 04:33:39 +0000 x86/local_apic.c: Fiddle with thermal LVT slot only if supported The thermal LVT slot does not necessarily exist. According to Intel's Software Developers Manual, for Intel processors supporting 64-bit operation (amd64), probably even the earliest ones should have a local APIC with such a slot (the slot was introduced with Pentium 4 and Xeon processors according to the manual, and the 64-bit implementation in some later versions of them). AMD's Architecture Programmer's Manual also seems to imply that all AMD processors supporting amd64 should have the slot too. So this change may not be needed when i386's code is dropped, but it does not hurt to have it, and it might ease possible MFCs. Change the signature of lapic_enable_thermal() so that it can report failure (if there is no local APIC or if there is no thermal LVT slot). Reviewed by: bnovkov, kib MFC after: 2 weeks Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D58086 (cherry picked from commit c18ec05395b36bdd12b0129533a553f27eb9b067) --- sys/x86/include/apicvar.h | 2 +- sys/x86/x86/local_apic.c | 22 ++++++++++++++++------ 2 files changed, 17 insertions(+), 7 deletions(-) diff --git a/sys/x86/include/apicvar.h b/sys/x86/include/apicvar.h index e0625a38d198..9eb874881641 100644 --- a/sys/x86/include/apicvar.h +++ b/sys/x86/include/apicvar.h @@ -235,7 +235,7 @@ void apic_enable_vector(u_int apic_id, u_int vector); void apic_disable_vector(u_int apic_id, u_int vector); void apic_free_vector(u_int apic_id, u_int vector, u_int irq); void lapic_calibrate_timer(void); -void lapic_enable_thermal(lapic_thermal_handler_t *func, void *func_arg); +bool lapic_enable_thermal(lapic_thermal_handler_t *func, void *func_arg); void lapic_disable_thermal(void); int lapic_enable_pcint(void); void lapic_disable_pcint(void); diff --git a/sys/x86/x86/local_apic.c b/sys/x86/x86/local_apic.c index 821b17358448..c5cb0867906a 100644 --- a/sys/x86/x86/local_apic.c +++ b/sys/x86/x86/local_apic.c @@ -804,9 +804,10 @@ lapic_dump(const char* str) printf("\n lint0: 0x%08x lint1: 0x%08x TPR: 0x%08x SVR: 0x%08x\n", lapic_read32(LAPIC_LVT_LINT0), lapic_read32(LAPIC_LVT_LINT1), lapic_read32(LAPIC_TPR), lapic_read32(LAPIC_SVR)); - printf(" timer: 0x%08x therm: 0x%08x err: 0x%08x", - lapic_read32(LAPIC_LVT_TIMER), lapic_read32(LAPIC_LVT_THERMAL), + printf(" timer: 0x%08x err: 0x%08x", lapic_read32(LAPIC_LVT_TIMER), lapic_read32(LAPIC_LVT_ERROR)); + if (maxlvt >= APIC_LVT_THERMAL) + printf(" therm: 0x%08x", lapic_read32(LAPIC_LVT_THERMAL)); if (maxlvt >= APIC_LVT_PMC) printf(" pmc: 0x%08x", lapic_read32(LAPIC_LVT_PCINT)); printf("\n"); @@ -932,8 +933,9 @@ lapic_setup(int boot) lapic_write32(LAPIC_ESR, 0); /* Thermal LVT */ - lapic_write32(LAPIC_LVT_THERMAL, lvt_mode(la, APIC_LVT_THERMAL, - lapic_read32(LAPIC_LVT_THERMAL))); + if (maxlvt >= APIC_LVT_THERMAL) + lapic_write32(LAPIC_LVT_THERMAL, lvt_mode(la, APIC_LVT_THERMAL, + lapic_read32(LAPIC_LVT_THERMAL))); /* Program the CMCI LVT entry if present. */ if (maxlvt >= APIC_LVT_CMCI) { @@ -1644,15 +1646,18 @@ lapic_update_thermal(void *dummy __unused) lapic_read32(LAPIC_LVT_THERMAL))); } -void +bool lapic_enable_thermal(lapic_thermal_handler_t *func, void *func_arg) { #ifdef DEV_ATPIC /* Fail if the local APIC is not present. */ if (!x2apic_mode && lapic_map == NULL) - return; + return (false); #endif + if (lapic_maxlvt() < APIC_LVT_THERMAL) + return (false); + lapic_thermal_function_arg = func_arg; atomic_store_rel_ptr((uintptr_t *)&lapic_thermal_function, (uintptr_t)func); @@ -1661,6 +1666,8 @@ lapic_enable_thermal(lapic_thermal_handler_t *func, void *func_arg) MPASS(mp_ncpus == 1 || smp_started); smp_rendezvous(NULL, lapic_update_thermal, NULL, NULL); + + return (true); } void @@ -1672,6 +1679,9 @@ lapic_disable_thermal(void) return; #endif + if (lapic_maxlvt() < APIC_LVT_THERMAL) + return; + lvts[APIC_LVT_THERMAL].lvt_masked = 1; #ifdef SMP