From owner-freebsd-hackers  Wed May 17 15:57: 6 2000
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Date: Wed, 17 May 2000 15:56:58 -0700 (PDT)
From: Jin Guojun (FTG staff) <jin@george.lbl.gov>
Message-Id: <200005172256.PAA25512@george.lbl.gov>
To: bright@wintelcom.net
Subject: Re: How to make system Sync
Cc: hackers@FreeBSD.ORG
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Alfred Perlstein <bright@wintelcom.net> stated:
> > I had a couple of system out of sync problems.
> > 
> > (1) PCI sync problem:
> >       ATM adapter updates a buffer return pointer and generates intr, 
> >       but when driver pulls out the information that updated by adapter,
> >       some memory in the last piece of the pool is garbage.
> > e.g.
> >       head -> c0100000
> >       tail -> c0100400
> > 
> >       c0100000 -> buf0
> >       c0100004 -> buf1
> >       ...
> >       c0100100 -> bufn
> >       ...
> >       c0100160 -> bad address or 0
> >       ...
> > 
> > If I let driver tsleep() for a while, the problem can be improved.
> > So, it looks like that adapter pushed (DMA) the data into memory,
> > but not been seen by CPU right way due to the DMA sync issue.
> > How can we sync the DMA transaction in BSD?
> 
> I think the way you accomplish this is by telling the adapter to
> generate an interrupt when it's completed its DMA operation, you
> seem to be generating interupts at the start instead of the end.

I do not think I have control on when interrupt can be started.
The interrupts are generated when either the # of buffers below
the buffer threshold or the I/O packages greater than I/O threshold.

In Solaris driver, a ddi_dma_sync() routine is used for DMA sync in this case:

#define BCD_FLUSH_CACHE_FOR_HOST(dhandle, offset, length) \
        ddi_dma_sync(dhandle, offset, length, DDI_DMA_SYNC_FORKERNEL)

Only thing I am not clear is that reference manual says:

For this adapter, the SDRAM_CTRL register "should" have LB_64_ENB bit set to 1.

There is no further information on this register. I wonder this could cause
the problem since majority PC motherboards have a 32-bit PCI local bus (LB).

	-Jin


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