Date: Thu, 15 Sep 2011 20:50:50 +0200 From: "K. Macy" <kmacy@freebsd.org> To: Arnaud Lacombe <lacombar@gmail.com> Cc: FreeBSD Hackers <freebsd-hackers@freebsd.org> Subject: Re: buf_ring(9) API precisions Message-ID: <CAHM0Q_P7NRQXay-ho1E--P4QnV5kr0eTo48NT21dbJjpbmAF=Q@mail.gmail.com> In-Reply-To: <CACqU3MXQ6tD804fKymeFeKDnHndSXVvHJwepYztB4DsnNmtMiw@mail.gmail.com> References: <CACqU3MXQ6tD804fKymeFeKDnHndSXVvHJwepYztB4DsnNmtMiw@mail.gmail.com>
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On Thu, Sep 15, 2011 at 4:53 AM, Arnaud Lacombe <lacombar@gmail.com> wrote:
> Hi Kip,
>
> I've got a few question about the buf_ring(9) API.
>
> 1) what means the 'drbr_' prefix. I can guess the two last letter, 'b'
> and 'r', for Buffer Ring, but what about 'd' and 'r' ?
DRiver BufRing
> 2) in `sys/sys/buf_ring.h', you defined 'struct buf_ring' as:
>
> struct buf_ring {
> =A0 =A0 =A0 =A0volatile uint32_t =A0 =A0 =A0 br_prod_head;
> =A0 =A0 =A0 =A0volatile uint32_t =A0 =A0 =A0 br_prod_tail;
> =A0 =A0 =A0 =A0int =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 br_prod_size;
> =A0 =A0 =A0 =A0int =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 br_prod_mask;
> =A0 =A0 =A0 =A0uint64_t =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0br_drops;
> =A0 =A0 =A0 =A0uint64_t =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0br_prod_bufs;
> =A0 =A0 =A0 =A0uint64_t =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0br_prod_bytes;
> =A0 =A0 =A0 =A0/*
> =A0 =A0 =A0 =A0 * Pad out to next L2 cache line
> =A0 =A0 =A0 =A0 */
> =A0 =A0 =A0 =A0uint64_t =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0_pad0[11];
>
> =A0 =A0 =A0 =A0volatile uint32_t =A0 =A0 =A0 br_cons_head;
> =A0 =A0 =A0 =A0volatile uint32_t =A0 =A0 =A0 br_cons_tail;
> =A0 =A0 =A0 =A0int =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 br_cons_size;
> =A0 =A0 =A0 =A0int =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 br_cons_mask;
>
> =A0 =A0 =A0 =A0/*
> =A0 =A0 =A0 =A0 * Pad out to next L2 cache line
> =A0 =A0 =A0 =A0 */
> =A0 =A0 =A0 =A0uint64_t =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0_pad1[14];
> #ifdef DEBUG_BUFRING
> =A0 =A0 =A0 =A0struct mtx =A0 =A0 =A0 =A0 =A0 =A0 =A0*br_lock;
> #endif
> =A0 =A0 =A0 =A0void =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*br_ring[0];
> };
>
> Why are you making an MD guess, the amount of padding to fit the size
> of a cache line, in MI API ? Strangely enough, you did not make this
> assumption in, say r205488 (picked randomly).
It has been several years, and I haven't done any work in svn in over
a year, I don't remember. I probably meant to refine it in a later
iteration.
If you would like to send me a patch addressing this I'd be more than
happy to apply it if appropriate. Otherwise, I will deal with it some
time after 9 settles.
Thanks for pointing this out.
Cheers
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