Date: Fri, 11 Aug 2017 17:50:49 +0000 (UTC) From: Li-Wen Hsu <lwhsu@FreeBSD.org> To: ports-committers@freebsd.org, svn-ports-all@freebsd.org, svn-ports-head@freebsd.org Subject: svn commit: r447782 - in head/emulators/riscv-isa-sim: . files Message-ID: <201708111750.v7BHonTK006003@repo.freebsd.org>
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Author: lwhsu Date: Fri Aug 11 17:50:49 2017 New Revision: 447782 URL: https://svnweb.freebsd.org/changeset/ports/447782 Log: - Update to 20170809 snapshot Modified: head/emulators/riscv-isa-sim/Makefile head/emulators/riscv-isa-sim/distinfo head/emulators/riscv-isa-sim/files/patch-Makefile.in head/emulators/riscv-isa-sim/files/patch-riscv_riscv.mk.in head/emulators/riscv-isa-sim/pkg-plist Modified: head/emulators/riscv-isa-sim/Makefile ============================================================================== --- head/emulators/riscv-isa-sim/Makefile Fri Aug 11 17:47:52 2017 (r447781) +++ head/emulators/riscv-isa-sim/Makefile Fri Aug 11 17:50:49 2017 (r447782) @@ -2,7 +2,7 @@ PORTNAME= riscv-isa-sim DISTVERSION= git -PORTREVISION= 20170207 +PORTREVISION= 20170809 CATEGORIES= emulators MAINTAINER= lwhsu@FreeBSD.org @@ -15,7 +15,7 @@ LIB_DEPENDS= libfesvr.so:emulators/riscv-fesvr ONLY_FOR_ARCHS= amd64 GH_ACCOUNT= freebsd-riscv -GH_TAGNAME= 11ec3a3 +GH_TAGNAME= 54ae820 USES= compiler:c++11-lang gmake shebangfix @@ -25,7 +25,8 @@ USE_GITHUB= yes USE_LDCONFIG= yes LDFLAGS+= -L${LOCALBASE}/lib -CFLAGS+= -I${LOCALBASE}/include +CFLAGS+= -I${LOCALBASE}/include \ + -DRISCV_ENABLE_DIRTY=1 STRIP_FILES= bin/spike \ bin/spike-dasm \ Modified: head/emulators/riscv-isa-sim/distinfo ============================================================================== --- head/emulators/riscv-isa-sim/distinfo Fri Aug 11 17:47:52 2017 (r447781) +++ head/emulators/riscv-isa-sim/distinfo Fri Aug 11 17:50:49 2017 (r447782) @@ -1,3 +1,3 @@ -TIMESTAMP = 1486479711 -SHA256 (freebsd-riscv-riscv-isa-sim-git-11ec3a3_GH0.tar.gz) = fc2e48c69477c8b25994cf540f508d0beaec578d972d83c1683ec32eb49d1d85 -SIZE (freebsd-riscv-riscv-isa-sim-git-11ec3a3_GH0.tar.gz) = 187995 +TIMESTAMP = 1502283838 +SHA256 (freebsd-riscv-riscv-isa-sim-git-54ae820_GH0.tar.gz) = 0e201f99f1a808e09f52859374198cdcf050c52f1e7900ca4f9c5a7ef9eb0ac6 +SIZE (freebsd-riscv-riscv-isa-sim-git-54ae820_GH0.tar.gz) = 199179 Modified: head/emulators/riscv-isa-sim/files/patch-Makefile.in ============================================================================== --- head/emulators/riscv-isa-sim/files/patch-Makefile.in Fri Aug 11 17:47:52 2017 (r447781) +++ head/emulators/riscv-isa-sim/files/patch-Makefile.in Fri Aug 11 17:50:49 2017 (r447782) @@ -1,6 +1,6 @@ ---- Makefile.in.orig 2016-08-01 15:40:47 UTC -+++ Makefile.in -@@ -188,13 +188,13 @@ _$(1).cc : +--- Makefile.in.orig 2017-08-08 20:00:25.889361000 +0100 ++++ Makefile.in 2017-08-08 20:06:41.633896000 +0100 +@@ -187,13 +187,13 @@ # Build the object files for this subproject @@ -14,6 +14,6 @@ -$$($(2)_pch) : %.h.gch : %.h +$(2)_deps += $$(patsubst %.hpp, %.h.d, $$($(2)_precompiled_hdrs)) +$$($(2)_pch) : %.h.gch : %.hpp - $(COMPILE) $$< -o $$@ + $(COMPILE) -x c++-header $$< -o $$@ # If using clang, don't depend (and thus don't build) precompiled headers $$($(2)_objs) : %.o : %.cc $$($(2)_gen_hdrs) $(if $(filter-out clang,$(CC)),$$($(2)_pch)) Modified: head/emulators/riscv-isa-sim/files/patch-riscv_riscv.mk.in ============================================================================== --- head/emulators/riscv-isa-sim/files/patch-riscv_riscv.mk.in Fri Aug 11 17:47:52 2017 (r447781) +++ head/emulators/riscv-isa-sim/files/patch-riscv_riscv.mk.in Fri Aug 11 17:50:49 2017 (r447782) @@ -1,14 +1,15 @@ ---- riscv/riscv.mk.in.orig 2016-08-01 15:40:47 UTC -+++ riscv/riscv.mk.in -@@ -21,13 +21,13 @@ riscv_hdrs = \ +--- riscv/riscv.mk.in.orig 2017-07-11 13:58:22.000000000 +0100 ++++ riscv/riscv.mk.in 2017-08-08 20:08:06.247906000 +0100 +@@ -21,14 +21,14 @@ tracer.h \ extension.h \ rocc.h \ - insn_template.h \ + insn_template.hpp \ mulhi.h \ - gdbserver.h \ debug_module.h \ + remote_bitbang.h \ + jtag_dtm.h \ riscv_precompiled_hdrs = \ - insn_template.h \ Modified: head/emulators/riscv-isa-sim/pkg-plist ============================================================================== --- head/emulators/riscv-isa-sim/pkg-plist Fri Aug 11 17:47:52 2017 (r447781) +++ head/emulators/riscv-isa-sim/pkg-plist Fri Aug 11 17:50:49 2017 (r447782) @@ -11,21 +11,22 @@ include/spike/devices.h include/spike/disasm.h include/spike/encoding.h include/spike/extension.h -include/spike/gdbserver.h include/spike/icache.h include/spike/insn_list.h include/spike/insn_template.hpp include/spike/internals.h +include/spike/jtag_dtm.h include/spike/memtracer.h include/spike/mmu.h include/spike/mulhi.h -include/spike/primitives.h include/spike/primitiveTypes.h +include/spike/primitives.h include/spike/processor.h +include/spike/remote_bitbang.h include/spike/rocc.h include/spike/sim.h -include/spike/softfloat_types.h include/spike/softfloat.h +include/spike/softfloat_types.h include/spike/specialize.h include/spike/tracer.h include/spike/trap.h
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