From owner-cvs-src@FreeBSD.ORG Mon May 24 08:53:17 2004 Return-Path: Delivered-To: cvs-src@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id EEA7416A4CE; Mon, 24 May 2004 08:53:17 -0700 (PDT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id E8D0843D1D; Mon, 24 May 2004 08:53:17 -0700 (PDT) (envelope-from imp@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.11/8.12.11) with ESMTP id i4OFqvnu061515; Mon, 24 May 2004 08:52:57 -0700 (PDT) (envelope-from imp@repoman.freebsd.org) Received: (from imp@localhost) by repoman.freebsd.org (8.12.11/8.12.11/Submit) id i4OFqvU9061514; Mon, 24 May 2004 08:52:57 -0700 (PDT) (envelope-from imp) Message-Id: <200405241552.i4OFqvU9061514@repoman.freebsd.org> From: Warner Losh Date: Mon, 24 May 2004 08:52:57 -0700 (PDT) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/dev/pci pci.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 24 May 2004 15:53:18 -0000 imp 2004/05/24 08:52:57 PDT FreeBSD src repository Modified files: sys/dev/pci pci.c Log: Do not write to those config registers that are unambiguously defined in the various pci specifications as readonly. vendor, subvendor, device and subdevice are required to be loaded in hardware by some means that isn't the system BIOS or other system software (although some devices do have ways of accomplishing this). class and subclass are defined to be read-only in section 6.2.1 (v2.2). Apart from the status register, which we weren't touching, these are the only read-only registers I could find in the 2.2 spec. progif is also defined as being read-only in section 6.2.1. However, the PCI IDE programming document specifically states that some of the bits are read/write. Since we may have to restore registers before we have a driver attached, go ahead and restore this one byte when transitioning between D3 and D0. The PCI spec also says that writes to reserved and unimplemented registers must be completed normally. It makes no statements about writes to read-only registers, so be as conservative as possible, while covering the exception to the rule that is documented in a subpart of the standard. Requested by: socttl Revision Changes Path 1.260 +0 -19 src/sys/dev/pci/pci.c