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Date:      Tue, 1 Sep 2020 22:00:07 +0000 (UTC)
From:      Mateusz Guzik <mjg@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r365178 - head/sys/dev/pci
Message-ID:  <202009012200.081M075A048563@repo.freebsd.org>

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Author: mjg
Date: Tue Sep  1 22:00:07 2020
New Revision: 365178
URL: https://svnweb.freebsd.org/changeset/base/365178

Log:
  pci: clean up empty lines in .c and .h files

Modified:
  head/sys/dev/pci/hostb_pci.c
  head/sys/dev/pci/isa_pci.c
  head/sys/dev/pci/pci.c
  head/sys/dev/pci/pci_dw.c
  head/sys/dev/pci/pci_dw.h
  head/sys/dev/pci/pci_dw_mv.c
  head/sys/dev/pci/pci_host_generic.c
  head/sys/dev/pci/pci_host_generic_fdt.c
  head/sys/dev/pci/pci_iov.c
  head/sys/dev/pci/pci_iov_private.h
  head/sys/dev/pci/pci_pci.c
  head/sys/dev/pci/pci_user.c
  head/sys/dev/pci/pcib_support.c
  head/sys/dev/pci/vga_pci.c

Modified: head/sys/dev/pci/hostb_pci.c
==============================================================================
--- head/sys/dev/pci/hostb_pci.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/hostb_pci.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -51,7 +51,6 @@ pci_hostb_probe(device_t dev)
 	id = pci_get_devid(dev);
 
 	switch (id) {
-
 	/* VIA VT82C596 Power Management Function */
 	case 0x30501106:
 		return (ENXIO);
@@ -280,7 +279,6 @@ static device_method_t pci_hostb_methods[] = {
 	DEVMETHOD(pci_find_next_extcap,	pci_hostb_find_next_extcap),
 	DEVMETHOD(pci_find_htcap,	pci_hostb_find_htcap),
 	DEVMETHOD(pci_find_next_htcap,	pci_hostb_find_next_htcap),
-
 	{ 0, 0 }
 };
 

Modified: head/sys/dev/pci/isa_pci.c
==============================================================================
--- head/sys/dev/pci/isa_pci.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/isa_pci.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -145,7 +145,7 @@ isab_pci_probe(device_t dev)
 		       pci_get_subclass(dev));
 	    matched = 1;
 	    break;
-	
+
 	default:
 	    break;
 	}

Modified: head/sys/dev/pci/pci.c
==============================================================================
--- head/sys/dev/pci/pci.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -317,7 +317,6 @@ static const struct pci_quirk pci_quirks[] = {
 	 * expected place.
 	 */
 	{ 0x98741002, PCI_QUIRK_REALLOC_BAR,	0, 	0 },
-
 	{ 0 }
 };
 
@@ -768,7 +767,6 @@ pci_ea_fill_info(device_t pcib, pcicfgregs *cfg)
 		ptr += 4;
 
 	for (a = 0; a < num_ent; a++) {
-
 		eae = malloc(sizeof(*eae), M_DEVBUF, M_WAITOK | M_ZERO);
 		eae->eae_cfg_offset = cfg->ea.ea_location + ptr;
 
@@ -2363,7 +2361,6 @@ pci_remap_intr_method(device_t bus, device_t dev, u_in
 	 * data registers and apply the results.
 	 */
 	if (cfg->msi.msi_alloc > 0) {
-
 		/* If we don't have any active handlers, nothing to do. */
 		if (cfg->msi.msi_handlers == 0)
 			return (0);
@@ -2593,7 +2590,6 @@ pci_alloc_msi_method(device_t dev, device_t child, int
 			device_printf(child, "using IRQs %d", irqs[0]);
 			run = 0;
 			for (i = 1; i < actual; i++) {
-
 				/* Still in a run? */
 				if (irqs[i] == irqs[i - 1] + 1) {
 					run = 1;
@@ -3862,7 +3858,6 @@ pci_add_resources_ea(device_t bus, device_t dev, int a
 		return;
 
 	STAILQ_FOREACH(ea, &dinfo->cfg.ea.ea_entries, eae_link) {
-
 		/*
 		 * TODO: Ignore EA-BAR if is not enabled.
 		 *   Currently the EA implementation supports
@@ -5261,7 +5256,6 @@ DB_SHOW_COMMAND(pciregs, db_pci_dump)
 	     dinfo = STAILQ_FIRST(devlist_head);
 	     (dinfo != NULL) && (error == 0) && (i < pci_numdevs) && !db_pager_quit;
 	     dinfo = STAILQ_NEXT(dinfo, pci_links), i++) {
-
 		/* Populate pd_name and pd_unit */
 		name = NULL;
 		if (dinfo->cfg.dev)

Modified: head/sys/dev/pci/pci_dw.c
==============================================================================
--- head/sys/dev/pci/pci_dw.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_dw.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -31,7 +31,6 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
-
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/bus.h>
@@ -82,13 +81,10 @@ __FBSDID("$FreeBSD$");
 #define	PCI_FUNC_MASK		0x07
 #define	PCI_REG_MASK		0xFFF
 
-
 #define	IATU_CFG_BUS(bus)	((uint64_t)((bus)  & 0xff) << 24)
 #define	IATU_CFG_SLOT(slot)	((uint64_t)((slot) & 0x1f) << 19)
 #define	IATU_CFG_FUNC(func)	((uint64_t)((func) & 0x07) << 16)
 
-
-
 static uint32_t
 pci_dw_dbi_read(device_t dev, u_int reg, int width)
 {
@@ -134,7 +130,6 @@ pci_dw_dbi_write(device_t dev, u_int reg, uint32_t val
 	}
 }
 
-
 static void
 pci_dw_dbi_protect(struct pci_dw_softc *sc, bool protect)
 {
@@ -243,7 +238,6 @@ pci_dw_setup_hw(struct pci_dw_softc *sc)
 	}
 	/* XXX Should we handle also prefetch memory? */
 
-
 	/* Adjust number of lanes */
 	reg = DBI_RD4(sc, DW_PORT_LINK_CTRL);
 	reg &= ~PORT_LINK_CAPABLE(~0);
@@ -274,7 +268,6 @@ pci_dw_setup_hw(struct pci_dw_softc *sc)
 	}
 	DBI_WR4(sc, DW_PORT_LINK_CTRL, reg);
 
-
 	/* And link width */
 	reg = DBI_RD4(sc, DW_GEN2_CTRL);
 	reg &= ~GEN2_CTRL_NUM_OF_LANES(~0);
@@ -304,7 +297,6 @@ pci_dw_setup_hw(struct pci_dw_softc *sc)
 	reg |= DIRECT_SPEED_CHANGE;
 	DBI_WR4(sc, DW_GEN2_CTRL, reg);
 
-
 	return (0);
 }
 
@@ -353,8 +345,6 @@ pci_dw_decode_ranges(struct pci_dw_softc *sc, struct o
 	return (0);
 }
 
-
-
 /*-----------------------------------------------------------------------------
  *
  *  P C I B   I N T E R F A C E
@@ -438,7 +428,6 @@ pci_dw_write_config(device_t dev, u_int bus, u_int slo
 		res = sc->cfg_res;
 	}
 
-
 	switch (bytes) {
 	case 1:
 		bus_write_1(res, reg, val);
@@ -658,7 +647,6 @@ out:
 }
 
 static device_method_t pci_dw_methods[] = {
-
 	/* Bus interface */
 	DEVMETHOD(bus_get_dma_tag,	pci_dw_get_dma_tag),
 

Modified: head/sys/dev/pci/pci_dw.h
==============================================================================
--- head/sys/dev/pci/pci_dw.h	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_dw.h	Tue Sep  1 22:00:07 2020	(r365178)
@@ -34,7 +34,6 @@
 
 #include "pci_dw_if.h"
 
-
 /* DesignWare CIe configuration registers */
 #define	DW_PORT_LINK_CTRL		0x710
 #define	 PORT_LINK_CAPABLE(n)			(((n) & 0x3F) << 16)
@@ -45,7 +44,6 @@
 #define	 PORT_LINK_CAPABLE_16			0x1F
 #define	 PORT_LINK_CAPABLE_32			0x3F
 
-
 #define	DW_GEN2_CTRL			0x80C
 #define	 DIRECT_SPEED_CHANGE			(1 << 17)
 #define	 GEN2_CTRL_NUM_OF_LANES(n)		(((n) & 0x3F) << 8)
@@ -62,7 +60,6 @@
 #define DW_MSI_INTR0_MASK		0x82C
 #define DW_MSI_INTR0_STATUS		0x830
 
-
 #define	DW_MISC_CONTROL_1		0x8BC
 #define	 DBI_RO_WR_EN				(1 << 0)
 
@@ -83,7 +80,6 @@
 #define	DW_IATU_LWR_TARGET_ADDR		0x918
 #define	DW_IATU_UPPER_TARGET_ADDR	0x91C
 
-
 struct pci_dw_softc {
 	struct ofw_pci_softc	ofw_pci;	/* Must be first */
 
@@ -115,7 +111,6 @@ struct pci_dw_softc {
 };
 
 DECLARE_CLASS(pci_dw_driver);
-
 
 static inline void
 pci_dw_dbi_wr4(device_t dev, u_int reg, uint32_t val)

Modified: head/sys/dev/pci/pci_dw_mv.c
==============================================================================
--- head/sys/dev/pci/pci_dw_mv.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_dw_mv.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -31,7 +31,6 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
-
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/bus.h>
@@ -145,7 +144,6 @@ pci_mv_init(struct pci_mv_softc *sc)
 {
 	uint32_t reg;
 
-
 	/* Set device configuration to RC */
 	reg = pci_dw_dbi_rd4(sc->dev, MV_GLOBAL_CONTROL_REG);
 	reg &= ~0x000000F0;
@@ -232,7 +230,7 @@ pci_mv_attach(device_t dev)
 	node = ofw_bus_get_node(dev);
 	sc->dev = dev;
 	sc->node = node;
-	
+
 	rid = 0;
 	sc->dw_sc.dbi_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
 	    RF_ACTIVE);
@@ -266,7 +264,6 @@ pci_mv_attach(device_t dev)
 		rv = ENXIO;
 		goto out;
 	}
-
 
 	rv = clk_enable(sc->clk_core);
 	if (rv != 0) {

Modified: head/sys/dev/pci/pci_host_generic.c
==============================================================================
--- head/sys/dev/pci/pci_host_generic.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_host_generic.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -261,7 +261,6 @@ generic_pcie_read_ivar(device_t dev, device_t child, i
 	if (index == PCIB_IVAR_BUS) {
 		*result = sc->bus_start;
 		return (0);
-
 	}
 
 	if (index == PCIB_IVAR_DOMAIN) {

Modified: head/sys/dev/pci/pci_host_generic_fdt.c
==============================================================================
--- head/sys/dev/pci/pci_host_generic_fdt.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_host_generic_fdt.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -506,7 +506,6 @@ generic_pcie_ofw_bus_attach(device_t dev)
 		get_addr_size_cells(parent, &addr_cells, &size_cells);
 		/* Iterate through all bus subordinates */
 		for (node = OF_child(parent); node > 0; node = OF_peer(node)) {
-
 			/* Allocate and populate devinfo. */
 			di = malloc(sizeof(*di), M_DEVBUF, M_WAITOK | M_ZERO);
 			if (ofw_bus_gen_setup_devinfo(&di->di_dinfo, node) != 0) {

Modified: head/sys/dev/pci/pci_iov.c
==============================================================================
--- head/sys/dev/pci/pci_iov.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_iov.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -83,7 +83,6 @@ static u_long pci_iov_max_config = 1024 * 1024;
 SYSCTL_ULONG(_hw_pci, OID_AUTO, iov_max_config, CTLFLAG_RWTUN,
     &pci_iov_max_config, 0, "Maximum allowed size of SR-IOV configuration.");
 
-
 #define IOV_READ(d, r, w) \
 	pci_read_config((d)->cfg.dev, (d)->cfg.iov->iov_pos + r, w)
 
@@ -128,7 +127,7 @@ pci_iov_attach_method(device_t bus, device_t dev, nvli
 	dinfo = device_get_ivars(dev);
 	pcib = device_get_parent(bus);
 	schema = NULL;
-	
+
 	error = pci_find_extcap(dev, PCIZ_SRIOV, &iov_pos);
 
 	if (error != 0)
@@ -171,7 +170,7 @@ pci_iov_attach_method(device_t bus, device_t dev, nvli
 		error = ENOMEM;
 		goto cleanup;
 	}
-	
+
 	dinfo->cfg.iov = iov;
 	iov->iov_cdev->si_drv1 = dinfo;
 	mtx_unlock(&Giant);
@@ -1061,4 +1060,3 @@ pci_vf_release_mem_resource(device_t dev, device_t chi
 
 	return (rman_release_resource(r));
 }
-

Modified: head/sys/dev/pci/pci_iov_private.h
==============================================================================
--- head/sys/dev/pci/pci_iov_private.h	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_iov_private.h	Tue Sep  1 22:00:07 2020	(r365178)
@@ -43,7 +43,7 @@ struct pcicfg_iov {
 	struct pci_iov_bar iov_bar[PCIR_MAX_BAR_0 + 1];
 	struct rman rman;
 	char rman_name[64];
- 
+
 	int iov_pos;
 	int iov_num_vfs;
 	uint32_t iov_flags;
@@ -59,4 +59,3 @@ void	pci_iov_cfg_restore(device_t dev, struct pci_devi
 void	pci_iov_cfg_save(device_t dev, struct pci_devinfo *dinfo);
 
 #endif
-

Modified: head/sys/dev/pci/pci_pci.c
==============================================================================
--- head/sys/dev/pci/pci_pci.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_pci.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -1445,7 +1445,7 @@ pcib_detach_hotplug(struct pcib_softc *sc)
 	}
 
 	pcib_pcie_hotplug_update(sc, val, mask, false);
-	
+
 	error = pcib_release_pcie_irq(sc);
 	if (error)
 		return (error);
@@ -2532,7 +2532,6 @@ pcib_xlate_ari(device_t pcib, int bus, int *slot, int 
 		*func = PCIE_ARI_FUNC(ari_func);
 	}
 }
-
 
 static void
 pcib_enable_ari(struct pcib_softc *sc, uint32_t pcie_pos)

Modified: head/sys/dev/pci/pci_user.c
==============================================================================
--- head/sys/dev/pci/pci_user.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pci_user.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -963,7 +963,6 @@ pci_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 
 		}
 	}
 
-
 	/* Giant because newbus is Giant locked revisit with newbus locking */
 	mtx_lock(&Giant);
 
@@ -1086,7 +1085,6 @@ pci_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 
 				 dinfo = STAILQ_FIRST(devlist_head);
 		     dinfo != NULL;
 		     dinfo = STAILQ_NEXT(dinfo, pci_links), i++) {
-
 			if (i < cio->offset)
 				continue;
 

Modified: head/sys/dev/pci/pcib_support.c
==============================================================================
--- head/sys/dev/pci/pcib_support.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/pcib_support.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -79,4 +79,3 @@ pcib_decode_rid(device_t pcib, uint16_t rid, int *bus,
 	*slot = PCI_RID2SLOT(rid);
 	*func = PCI_RID2FUNC(rid);
 }
-

Modified: head/sys/dev/pci/vga_pci.c
==============================================================================
--- head/sys/dev/pci/vga_pci.c	Tue Sep  1 21:59:31 2020	(r365177)
+++ head/sys/dev/pci/vga_pci.c	Tue Sep  1 22:00:07 2020	(r365178)
@@ -160,7 +160,6 @@ vga_pci_reset(device_t dev)
 	pci_set_powerstate(dev, ps);
 }
 
-
 void *
 vga_pci_map_bios(device_t dev, size_t *size)
 {
@@ -779,7 +778,6 @@ static device_method_t vga_pci_methods[] = {
 	DEVMETHOD(pci_release_msi,	vga_pci_release_msi),
 	DEVMETHOD(pci_msi_count,	vga_pci_msi_count),
 	DEVMETHOD(pci_msix_count,	vga_pci_msix_count),
-
 	{ 0, 0 }
 };
 



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