Date: Wed, 18 Oct 2023 18:06:01 GMT From: Mitchell Horne <mhorne@FreeBSD.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Subject: git: 75780146d627 - main - hwpmc_amd: simplify counter descriptor definitions Message-ID: <202310181806.39II61fi045910@gitrepo.freebsd.org>
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The branch main has been updated by mhorne: URL: https://cgit.FreeBSD.org/src/commit/?id=75780146d627ff4be978191a142da4d67be5aaa6 commit 75780146d627ff4be978191a142da4d67be5aaa6 Author: Mitchell Horne <mhorne@FreeBSD.org> AuthorDate: 2023-10-18 17:54:04 +0000 Commit: Mitchell Horne <mhorne@FreeBSD.org> CommitDate: 2023-10-18 18:05:44 +0000 hwpmc_amd: simplify counter descriptor definitions No functional change intended. Reviewed by: jkoshy MFC after: 1 week Sponsored by: The FreeBSD Foundation Differential Revision: https://reviews.freebsd.org/D41273 --- sys/dev/hwpmc/hwpmc_amd.c | 207 +++++++--------------------------------------- 1 file changed, 30 insertions(+), 177 deletions(-) diff --git a/sys/dev/hwpmc/hwpmc_amd.c b/sys/dev/hwpmc/hwpmc_amd.c index d8ca2e094d02..367f9d0ceebf 100644 --- a/sys/dev/hwpmc/hwpmc_amd.c +++ b/sys/dev/hwpmc/hwpmc_amd.c @@ -63,184 +63,37 @@ struct amd_descr { uint32_t pm_perfctr; /* address of PERFCTR register */ }; -static struct amd_descr amd_pmcdesc[AMD_NPMCS] = +/* Counter hardware. */ +#define PMCDESC(evsel, perfctr) \ + { \ + .pm_descr = { \ + .pd_name = "", \ + .pd_class = -1, \ + .pd_caps = AMD_PMC_CAPS, \ + .pd_width = 48 \ + }, \ + .pm_evsel = (evsel), \ + .pm_perfctr = (perfctr) \ + } + +static struct amd_descr amd_pmcdesc[AMD_NPMCS] = { - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_0, - .pm_perfctr = AMD_PMC_PERFCTR_0 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_1, - .pm_perfctr = AMD_PMC_PERFCTR_1 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_2, - .pm_perfctr = AMD_PMC_PERFCTR_2 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_3, - .pm_perfctr = AMD_PMC_PERFCTR_3 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_4, - .pm_perfctr = AMD_PMC_PERFCTR_4 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_5, - .pm_perfctr = AMD_PMC_PERFCTR_5 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_L3_0, - .pm_perfctr = AMD_PMC_PERFCTR_EP_L3_0 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_L3_1, - .pm_perfctr = AMD_PMC_PERFCTR_EP_L3_1 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_L3_2, - .pm_perfctr = AMD_PMC_PERFCTR_EP_L3_2 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_L3_3, - .pm_perfctr = AMD_PMC_PERFCTR_EP_L3_3 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_L3_4, - .pm_perfctr = AMD_PMC_PERFCTR_EP_L3_4 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_L3_5, - .pm_perfctr = AMD_PMC_PERFCTR_EP_L3_5 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_DF_0, - .pm_perfctr = AMD_PMC_PERFCTR_EP_DF_0 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_DF_1, - .pm_perfctr = AMD_PMC_PERFCTR_EP_DF_1 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_DF_2, - .pm_perfctr = AMD_PMC_PERFCTR_EP_DF_2 - }, - { - .pm_descr = - { - .pd_name = "", - .pd_class = -1, - .pd_caps = AMD_PMC_CAPS, - .pd_width = 48 - }, - .pm_evsel = AMD_PMC_EVSEL_EP_DF_3, - .pm_perfctr = AMD_PMC_PERFCTR_EP_DF_3 - } + PMCDESC(AMD_PMC_EVSEL_0, AMD_PMC_PERFCTR_0), + PMCDESC(AMD_PMC_EVSEL_1, AMD_PMC_PERFCTR_1), + PMCDESC(AMD_PMC_EVSEL_2, AMD_PMC_PERFCTR_2), + PMCDESC(AMD_PMC_EVSEL_3, AMD_PMC_PERFCTR_3), + PMCDESC(AMD_PMC_EVSEL_4, AMD_PMC_PERFCTR_4), + PMCDESC(AMD_PMC_EVSEL_5, AMD_PMC_PERFCTR_5), + PMCDESC(AMD_PMC_EVSEL_EP_L3_0, AMD_PMC_PERFCTR_EP_L3_0), + PMCDESC(AMD_PMC_EVSEL_EP_L3_1, AMD_PMC_PERFCTR_EP_L3_1), + PMCDESC(AMD_PMC_EVSEL_EP_L3_2, AMD_PMC_PERFCTR_EP_L3_2), + PMCDESC(AMD_PMC_EVSEL_EP_L3_3, AMD_PMC_PERFCTR_EP_L3_3), + PMCDESC(AMD_PMC_EVSEL_EP_L3_4, AMD_PMC_PERFCTR_EP_L3_4), + PMCDESC(AMD_PMC_EVSEL_EP_L3_5, AMD_PMC_PERFCTR_EP_L3_5), + PMCDESC(AMD_PMC_EVSEL_EP_DF_0, AMD_PMC_PERFCTR_EP_DF_0), + PMCDESC(AMD_PMC_EVSEL_EP_DF_1, AMD_PMC_PERFCTR_EP_DF_1), + PMCDESC(AMD_PMC_EVSEL_EP_DF_2, AMD_PMC_PERFCTR_EP_DF_2), + PMCDESC(AMD_PMC_EVSEL_EP_DF_3, AMD_PMC_PERFCTR_EP_DF_3) }; struct amd_event_code_map {
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