Date: Sat, 19 Jun 1999 15:40:34 +0930 (CST) From: "Daniel J. O'Connor" <darius@dons.net.au> To: Ludwig Pummer <ludwigp@bigfoot.com> Cc: stable@freebsd.org, questions@freebsd.org, Pat Lynch <lynch@bsdunix.net> Subject: Re: SMP and celerons? Message-ID: <XFMail.990619154034.darius@dons.net.au> In-Reply-To: <4.1.19990618174127.00aae2e0@mail-r>
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This message is in MIME format --_=XFMail.1.3.p0.FreeBSD:990619154034:5705=_ Content-Type: text/plain; charset=us-ascii On 19-Jun-99 Ludwig Pummer wrote: > Celerons don't support multiprocessor configurations. A co-worker already > tried this (2 Celerons on an Asus P2B-D), and Intel's product info on the > Celeron doesn't mention APIC or multi-CPU configurations. The only reason this is true is because of the way intel put the Celeron chip inside the Slot 1 CPU case.. The core *IS* a PII with less cache. Intel don't mention it for fairly obvious reasons. --- Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum --_=XFMail.1.3.p0.FreeBSD:990619154034:5705=_ Content-Type: application/pgp-signature -----BEGIN PGP MESSAGE----- Version: 2.6.3ia iQCVAwUBN2s0Wmj0TqzKxF7VAQGm5AP/Ykn7j/RgXeGNR3Gi+MDkfWhSqy6qZcvg 2lOW17DUTbn5OtuocmhZCUV84tO+GXEdUQHAF3qWE8LoFyFu5PeQWhO3JueUW55Y OB7UtSF0C53289svEFuxeqqiI9lb8NndPO39BUUpb1GFkYfKZqwDlkSNWFtLUBDF 8JxUDmtNaUY= =Z28G -----END PGP MESSAGE----- --_=XFMail.1.3.p0.FreeBSD:990619154034:5705=_-- End of MIME message To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message
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