From owner-svn-src-stable@FreeBSD.ORG Wed Jun 23 13:13:15 2010 Return-Path: Delivered-To: svn-src-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 1257D1065672; Wed, 23 Jun 2010 13:13:15 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 007C48FC19; Wed, 23 Jun 2010 13:13:15 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o5NDDEou074830; Wed, 23 Jun 2010 13:13:14 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o5NDDEbU074827; Wed, 23 Jun 2010 13:13:14 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201006231313.o5NDDEbU074827@svn.freebsd.org> From: Nathan Whitehorn Date: Wed, 23 Jun 2010 13:13:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-8@freebsd.org X-SVN-Group: stable-8 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r209464 - stable/8/sys/powerpc/aim X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 23 Jun 2010 13:13:15 -0000 Author: nwhitehorn Date: Wed Jun 23 13:13:14 2010 New Revision: 209464 URL: http://svn.freebsd.org/changeset/base/209464 Log: MFC r209369: Temporarily disable instruction relocation while setting up the kernel's IBAT entry in early boot in order to prevent possible faults from races between the instruction cache and the MMU. PR: powerpc/148003 Modified: stable/8/sys/powerpc/aim/mmu_oea.c Directory Properties: stable/8/sys/ (props changed) stable/8/sys/amd64/include/xen/ (props changed) stable/8/sys/cddl/contrib/opensolaris/ (props changed) stable/8/sys/contrib/dev/acpica/ (props changed) stable/8/sys/contrib/pf/ (props changed) stable/8/sys/dev/ixgbe/ (props changed) stable/8/sys/dev/xen/xenpci/ (props changed) stable/8/sys/geom/sched/ (props changed) Modified: stable/8/sys/powerpc/aim/mmu_oea.c ============================================================================== --- stable/8/sys/powerpc/aim/mmu_oea.c Wed Jun 23 12:17:13 2010 (r209463) +++ stable/8/sys/powerpc/aim/mmu_oea.c Wed Jun 23 13:13:14 2010 (r209464) @@ -670,6 +670,7 @@ moea_bootstrap(mmu_t mmup, vm_offset_t k vm_size_t size, physsz, hwphyssz; vm_offset_t pa, va, off; void *dpcpu; + register_t msr; /* * Set up BAT0 to map the lowest 256 MB area @@ -700,12 +701,16 @@ moea_bootstrap(mmu_t mmup, vm_offset_t k /* * Use an IBAT and a DBAT to map the bottom segment of memory - * where we are. + * where we are. Turn off instruction relocation temporarily + * to prevent faults while reprogramming the IBAT. */ + msr = mfmsr(); + mtmsr(msr & ~PSL_IR); __asm (".balign 32; \n" "mtibatu 0,%0; mtibatl 0,%1; isync; \n" "mtdbatu 0,%0; mtdbatl 0,%1; isync" :: "r"(battable[0].batu), "r"(battable[0].batl)); + mtmsr(msr); /* map pci space */ __asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu));