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Date:      Tue, 1 Sep 2020 22:00:48 +0000 (UTC)
From:      Mateusz Guzik <mjg@FreeBSD.org>
To:        src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org
Subject:   svn commit: r365180 - head/sys/dev/pccbb
Message-ID:  <202009012200.081M0mmi048695@repo.freebsd.org>

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Author: mjg
Date: Tue Sep  1 22:00:48 2020
New Revision: 365180
URL: https://svnweb.freebsd.org/changeset/base/365180

Log:
  pccbb: clean up empty lines in .c and .h files

Modified:
  head/sys/dev/pccbb/pccbb.c
  head/sys/dev/pccbb/pccbbreg.h

Modified: head/sys/dev/pccbb/pccbb.c
==============================================================================
--- head/sys/dev/pccbb/pccbb.c	Tue Sep  1 22:00:30 2020	(r365179)
+++ head/sys/dev/pccbb/pccbb.c	Tue Sep  1 22:00:48 2020	(r365180)
@@ -193,7 +193,7 @@ static struct resource *
 cbb_find_res(struct cbb_softc *sc, int type, int rid)
 {
 	struct cbb_reslist *rle;
-	
+
 	SLIST_FOREACH(rle, &sc->rl, link)
 		if (SYS_RES_MEMORY == rle->type && rid == rle->rid)
 			return (rle->res);
@@ -405,7 +405,6 @@ cbb_teardown_intr(device_t dev, device_t child, struct
 	return (0);
 }
 
-
 void
 cbb_driver_added(device_t brdev, driver_t *driver)
 {
@@ -884,7 +883,7 @@ cbb_current_voltage(device_t brdev)
 {
 	struct cbb_softc *sc = device_get_softc(brdev);
 	uint32_t ctrl;
-	
+
 	ctrl = cbb_get(sc, CBB_SOCKET_CONTROL);
 	switch (ctrl & CBB_SOCKET_CTRL_VCCMASK) {
 	case CBB_SOCKET_CTRL_VCC_5V:
@@ -1496,7 +1495,6 @@ cbb_pcic_set_memory_offset(device_t brdev, device_t ch
 /************************************************************************/
 /* BUS Methods								*/
 /************************************************************************/
-
 
 int
 cbb_activate_resource(device_t brdev, device_t child, int type, int rid,

Modified: head/sys/dev/pccbb/pccbbreg.h
==============================================================================
--- head/sys/dev/pccbb/pccbbreg.h	Tue Sep  1 22:00:30 2020	(r365179)
+++ head/sys/dev/pccbb/pccbbreg.h	Tue Sep  1 22:00:48 2020	(r365180)
@@ -62,7 +62,6 @@
  * Register definitions for PCI to Cardbus Bridge chips
  */
 
-
 /* PCI header registers */
 #define	CBBR_SOCKBASE				0x10	/* len=4 */
 
@@ -187,7 +186,6 @@
 # define TOPIC97_REG_CTRL_RI_DISABLE  0x00000004
 # define TOPIC97_REG_CTRL_CAUDIO_OFF  0x00000002
 # define TOPIC_REG_CTRL_CAUDIO_INVERT 0x00000001
-
 
 /* Socket definitions */
 #define	CBB_SOCKET_EVENT_CSTS		0x01	/* Card Status Change */



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