Date: Mon, 26 Mar 2018 20:25:24 +0000 (UTC) From: Hans Petter Selasky <hselasky@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r331576 - in stable/11/sys/dev/mlx5: . mlx5_core mlx5_en mlx5_ib Message-ID: <201803262025.w2QKPOgv016385@repo.freebsd.org>
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Author: hselasky Date: Mon Mar 26 20:25:24 2018 New Revision: 331576 URL: https://svnweb.freebsd.org/changeset/base/331576 Log: MFC r330606: Implement support for querying the current port rate in mlx5core. The mlx5ib(4) part will be merged separately. - Factor out port speed definitions into new port.h header file, similarly as done in Linux upstream. - Correct two existing port speed definitions in mlx5en according to Linux upstream. Sponsored by: Mellanox Technologies Added: stable/11/sys/dev/mlx5/port.h - copied unchanged from r330606, head/sys/dev/mlx5/port.h Modified: stable/11/sys/dev/mlx5/driver.h stable/11/sys/dev/mlx5/mlx5_core/mlx5_eq.c stable/11/sys/dev/mlx5/mlx5_core/mlx5_port.c stable/11/sys/dev/mlx5/mlx5_en/en.h stable/11/sys/dev/mlx5/mlx5_en/mlx5_en_main.c stable/11/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/dev/mlx5/driver.h ============================================================================== --- stable/11/sys/dev/mlx5/driver.h Mon Mar 26 20:10:49 2018 (r331575) +++ stable/11/sys/dev/mlx5/driver.h Mon Mar 26 20:25:24 2018 (r331576) @@ -928,41 +928,7 @@ int mlx5_core_access_reg(struct mlx5_core_dev *dev, vo u16 reg_num, int arg, int write); void mlx5_toggle_port_link(struct mlx5_core_dev *dev); -int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps); -int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys, - int ptys_size, int proto_mask); -int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev, - u32 *proto_cap, int proto_mask); -int mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask, - u8 *an_disable_cap, u8 *an_disable_status); -int mlx5_set_port_autoneg(struct mlx5_core_dev *dev, bool disable, - u32 eth_proto_admin, int proto_mask); -int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev, - u32 *proto_admin, int proto_mask); -int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin, - int proto_mask); -int mlx5_set_port_status(struct mlx5_core_dev *dev, - enum mlx5_port_status status); -int mlx5_query_port_status(struct mlx5_core_dev *dev, u8 *status); -int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, - enum mlx5_port_status *status); -int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 port, - u32 rx_pause, u32 tx_pause); -int mlx5_query_port_pause(struct mlx5_core_dev *dev, u32 port, - u32 *rx_pause, u32 *tx_pause); -int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx); -int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx); -int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu); -int mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, int *max_mtu); -int mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, int *oper_mtu); - -unsigned int mlx5_query_module_status(struct mlx5_core_dev *dev, int module_num); -int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num); -int mlx5_query_eeprom(struct mlx5_core_dev *dev, int i2c_addr, int page_num, - int device_addr, int size, int module_num, u32 *data, - int *size_read); - int mlx5_debug_eq_add(struct mlx5_core_dev *dev, struct mlx5_eq *eq); void mlx5_debug_eq_remove(struct mlx5_core_dev *dev, struct mlx5_eq *eq); int mlx5_core_eq_query(struct mlx5_core_dev *dev, struct mlx5_eq *eq, @@ -1067,8 +1033,4 @@ static inline int mlx5_core_is_pf(struct mlx5_core_dev return !(dev->priv.pci_dev_data & MLX5_PCI_DEV_IS_VF); } -#define MLX5_EEPROM_MAX_BYTES 32 -#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff -#define MLX5_EEPROM_REVISION_ID_BYTE_MASK 0x0000ff00 -#define MLX5_EEPROM_PAGE_3_VALID_BIT_MASK 0x00040000 #endif /* MLX5_DRIVER_H */ Modified: stable/11/sys/dev/mlx5/mlx5_core/mlx5_eq.c ============================================================================== --- stable/11/sys/dev/mlx5/mlx5_core/mlx5_eq.c Mon Mar 26 20:10:49 2018 (r331575) +++ stable/11/sys/dev/mlx5/mlx5_core/mlx5_eq.c Mon Mar 26 20:25:24 2018 (r331576) @@ -27,7 +27,7 @@ #include <linux/interrupt.h> #include <linux/module.h> -#include <dev/mlx5/driver.h> +#include <dev/mlx5/port.h> #include <dev/mlx5/mlx5_ifc.h> #include "mlx5_core.h" Modified: stable/11/sys/dev/mlx5/mlx5_core/mlx5_port.c ============================================================================== --- stable/11/sys/dev/mlx5/mlx5_core/mlx5_port.c Mon Mar 26 20:10:49 2018 (r331575) +++ stable/11/sys/dev/mlx5/mlx5_core/mlx5_port.c Mon Mar 26 20:25:24 2018 (r331576) @@ -26,7 +26,7 @@ */ #include <linux/module.h> -#include <dev/mlx5/driver.h> +#include <dev/mlx5/port.h> #include "mlx5_core.h" int mlx5_core_access_reg(struct mlx5_core_dev *dev, void *data_in, @@ -110,13 +110,13 @@ int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 p EXPORT_SYMBOL_GPL(mlx5_set_port_caps); int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys, - int ptys_size, int proto_mask) + int ptys_size, int proto_mask, u8 local_port) { u32 in[MLX5_ST_SZ_DW(ptys_reg)]; int err; memset(in, 0, sizeof(in)); - MLX5_SET(ptys_reg, in, local_port, 1); + MLX5_SET(ptys_reg, in, local_port, local_port); MLX5_SET(ptys_reg, in, proto_mask, proto_mask); err = mlx5_core_access_reg(dev, in, sizeof(in), ptys, @@ -132,7 +132,7 @@ int mlx5_query_port_proto_cap(struct mlx5_core_dev *de u32 out[MLX5_ST_SZ_DW(ptys_reg)]; int err; - err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask); + err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask, 1); if (err) return err; @@ -151,7 +151,7 @@ int mlx5_query_port_autoneg(struct mlx5_core_dev *dev, u32 out[MLX5_ST_SZ_DW(ptys_reg)]; int err; - err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask); + err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask, 1); if (err) return err; @@ -198,7 +198,7 @@ int mlx5_query_port_proto_admin(struct mlx5_core_dev * u32 out[MLX5_ST_SZ_DW(ptys_reg)]; int err; - err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask); + err = mlx5_query_port_ptys(dev, out, sizeof(out), proto_mask, 1); if (err) return err; @@ -210,6 +210,23 @@ int mlx5_query_port_proto_admin(struct mlx5_core_dev * return 0; } EXPORT_SYMBOL_GPL(mlx5_query_port_proto_admin); + +int mlx5_query_port_eth_proto_oper(struct mlx5_core_dev *dev, + u32 *proto_oper, u8 local_port) +{ + u32 out[MLX5_ST_SZ_DW(ptys_reg)]; + int err; + + err = mlx5_query_port_ptys(dev, out, sizeof(out), MLX5_PTYS_EN, + local_port); + if (err) + return err; + + *proto_oper = MLX5_GET(ptys_reg, out, eth_proto_oper); + + return 0; +} +EXPORT_SYMBOL(mlx5_query_port_eth_proto_oper); int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin, int proto_mask) Modified: stable/11/sys/dev/mlx5/mlx5_en/en.h ============================================================================== --- stable/11/sys/dev/mlx5/mlx5_en/en.h Mon Mar 26 20:10:49 2018 (r331575) +++ stable/11/sys/dev/mlx5/mlx5_en/en.h Mon Mar 26 20:25:24 2018 (r331576) @@ -62,6 +62,7 @@ #include <dev/mlx5/driver.h> #include <dev/mlx5/qp.h> #include <dev/mlx5/cq.h> +#include <dev/mlx5/port.h> #include <dev/mlx5/vport.h> #include <dev/mlx5/diagnostics.h> @@ -731,37 +732,6 @@ struct mlx5e_eeprom { u32 *data; }; -enum mlx5e_link_mode { - MLX5E_1000BASE_CX_SGMII = 0, - MLX5E_1000BASE_KX = 1, - MLX5E_10GBASE_CX4 = 2, - MLX5E_10GBASE_KX4 = 3, - MLX5E_10GBASE_KR = 4, - MLX5E_20GBASE_KR2 = 5, - MLX5E_40GBASE_CR4 = 6, - MLX5E_40GBASE_KR4 = 7, - MLX5E_56GBASE_R4 = 8, - MLX5E_10GBASE_CR = 12, - MLX5E_10GBASE_SR = 13, - MLX5E_10GBASE_LR = 14, - MLX5E_40GBASE_SR4 = 15, - MLX5E_40GBASE_LR4 = 16, - MLX5E_100GBASE_CR4 = 20, - MLX5E_100GBASE_SR4 = 21, - MLX5E_100GBASE_KR4 = 22, - MLX5E_100GBASE_LR4 = 23, - MLX5E_100BASE_TX = 24, - MLX5E_100BASE_T = 25, - MLX5E_10GBASE_T = 26, - MLX5E_25GBASE_CR = 27, - MLX5E_25GBASE_KR = 28, - MLX5E_25GBASE_SR = 29, - MLX5E_50GBASE_CR2 = 30, - MLX5E_50GBASE_KR2 = 31, - MLX5E_LINK_MODES_NUMBER, -}; - -#define MLX5E_PROT_MASK(link_mode) (1 << (link_mode)) #define MLX5E_FLD_MAX(typ, fld) ((1ULL << __mlx5_bit_sz(typ, fld)) - 1ULL) int mlx5e_xmit(struct ifnet *, struct mbuf *); Modified: stable/11/sys/dev/mlx5/mlx5_en/mlx5_en_main.c ============================================================================== --- stable/11/sys/dev/mlx5/mlx5_en/mlx5_en_main.c Mon Mar 26 20:10:49 2018 (r331575) +++ stable/11/sys/dev/mlx5/mlx5_en/mlx5_en_main.c Mon Mar 26 20:25:24 2018 (r331576) @@ -90,8 +90,8 @@ static const struct { .subtype = IFM_10G_SR, .baudrate = IF_Gbps(10ULL), }, - [MLX5E_10GBASE_LR] = { - .subtype = IFM_10G_LR, + [MLX5E_10GBASE_ER] = { + .subtype = IFM_10G_ER, .baudrate = IF_Gbps(10ULL), }, [MLX5E_40GBASE_SR4] = { @@ -122,9 +122,9 @@ static const struct { .subtype = IFM_100_TX, .baudrate = IF_Mbps(100ULL), }, - [MLX5E_100BASE_T] = { - .subtype = IFM_100_T, - .baudrate = IF_Mbps(100ULL), + [MLX5E_1000BASE_T] = { + .subtype = IFM_1000_T, + .baudrate = IF_Mbps(1000ULL), }, [MLX5E_10GBASE_T] = { .subtype = IFM_10G_T, @@ -176,7 +176,7 @@ mlx5e_update_carrier(struct mlx5e_priv *priv) return; } - error = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN); + error = mlx5_query_port_ptys(mdev, out, sizeof(out), MLX5_PTYS_EN, 1); if (error) { priv->media_active_last = IFM_ETHER; priv->ifp->if_baudrate = 1; Modified: stable/11/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c ============================================================================== --- stable/11/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c Mon Mar 26 20:10:49 2018 (r331575) +++ stable/11/sys/dev/mlx5/mlx5_ib/mlx5_ib_main.c Mon Mar 26 20:25:24 2018 (r331576) @@ -35,6 +35,7 @@ #include <linux/etherdevice.h> #include <linux/list.h> #include <dev/mlx5/driver.h> +#include <dev/mlx5/port.h> #include <dev/mlx5/vport.h> #include <asm/pgtable.h> #include <linux/fs.h> Copied: stable/11/sys/dev/mlx5/port.h (from r330606, head/sys/dev/mlx5/port.h) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/11/sys/dev/mlx5/port.h Mon Mar 26 20:25:24 2018 (r331576, copy of r330606, head/sys/dev/mlx5/port.h) @@ -0,0 +1,147 @@ +/*- + * Copyright (c) 2016, Mellanox Technologies, Ltd. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS `AS IS' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef __MLX5_PORT_H__ +#define __MLX5_PORT_H__ + +#include <dev/mlx5/driver.h> + +enum mlx5_beacon_duration { + MLX5_BEACON_DURATION_OFF = 0x0, + MLX5_BEACON_DURATION_INF = 0xffff, +}; + +enum mlx5_module_id { + MLX5_MODULE_ID_SFP = 0x3, + MLX5_MODULE_ID_QSFP = 0xC, + MLX5_MODULE_ID_QSFP_PLUS = 0xD, + MLX5_MODULE_ID_QSFP28 = 0x11, +}; + +enum mlx5_an_status { + MLX5_AN_UNAVAILABLE = 0, + MLX5_AN_COMPLETE = 1, + MLX5_AN_FAILED = 2, + MLX5_AN_LINK_UP = 3, + MLX5_AN_LINK_DOWN = 4, +}; + +#define MLX5_EEPROM_MAX_BYTES 32 +#define MLX5_EEPROM_IDENTIFIER_BYTE_MASK 0x000000ff +#define MLX5_EEPROM_REVISION_ID_BYTE_MASK 0x0000ff00 +#define MLX5_EEPROM_PAGE_3_VALID_BIT_MASK 0x00040000 +#define MLX5_I2C_ADDR_LOW 0x50 +#define MLX5_I2C_ADDR_HIGH 0x51 +#define MLX5_EEPROM_PAGE_LENGTH 256 + +enum mlx5e_link_mode { + MLX5E_1000BASE_CX_SGMII = 0, + MLX5E_1000BASE_KX = 1, + MLX5E_10GBASE_CX4 = 2, + MLX5E_10GBASE_KX4 = 3, + MLX5E_10GBASE_KR = 4, + MLX5E_20GBASE_KR2 = 5, + MLX5E_40GBASE_CR4 = 6, + MLX5E_40GBASE_KR4 = 7, + MLX5E_56GBASE_R4 = 8, + MLX5E_10GBASE_CR = 12, + MLX5E_10GBASE_SR = 13, + MLX5E_10GBASE_ER = 14, + MLX5E_40GBASE_SR4 = 15, + MLX5E_40GBASE_LR4 = 16, + MLX5E_50GBASE_SR2 = 18, + MLX5E_100GBASE_CR4 = 20, + MLX5E_100GBASE_SR4 = 21, + MLX5E_100GBASE_KR4 = 22, + MLX5E_100GBASE_LR4 = 23, + MLX5E_100BASE_TX = 24, + MLX5E_1000BASE_T = 25, + MLX5E_10GBASE_T = 26, + MLX5E_25GBASE_CR = 27, + MLX5E_25GBASE_KR = 28, + MLX5E_25GBASE_SR = 29, + MLX5E_50GBASE_CR2 = 30, + MLX5E_50GBASE_KR2 = 31, + MLX5E_LINK_MODES_NUMBER, +}; + +enum mlx5e_connector_type { + MLX5E_PORT_UNKNOWN = 0, + MLX5E_PORT_NONE = 1, + MLX5E_PORT_TP = 2, + MLX5E_PORT_AUI = 3, + MLX5E_PORT_BNC = 4, + MLX5E_PORT_MII = 5, + MLX5E_PORT_FIBRE = 6, + MLX5E_PORT_DA = 7, + MLX5E_PORT_OTHER = 8, + MLX5E_CONNECTOR_TYPE_NUMBER, +}; + +#define MLX5E_PROT_MASK(link_mode) (1 << (link_mode)) + +#define PORT_MODULE_EVENT_MODULE_STATUS_MASK 0xF +#define PORT_MODULE_EVENT_ERROR_TYPE_MASK 0xF + +int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps); +int mlx5_query_port_ptys(struct mlx5_core_dev *dev, u32 *ptys, + int ptys_size, int proto_mask, u8 local_port); +int mlx5_query_port_proto_cap(struct mlx5_core_dev *dev, + u32 *proto_cap, int proto_mask); +int mlx5_query_port_autoneg(struct mlx5_core_dev *dev, int proto_mask, + u8 *an_disable_cap, u8 *an_disable_status); +int mlx5_set_port_autoneg(struct mlx5_core_dev *dev, bool disable, + u32 eth_proto_admin, int proto_mask); +int mlx5_query_port_proto_admin(struct mlx5_core_dev *dev, + u32 *proto_admin, int proto_mask); +int mlx5_query_port_eth_proto_oper(struct mlx5_core_dev *dev, + u32 *proto_oper, u8 local_port); +int mlx5_set_port_proto(struct mlx5_core_dev *dev, u32 proto_admin, + int proto_mask); +int mlx5_set_port_status(struct mlx5_core_dev *dev, + enum mlx5_port_status status); +int mlx5_query_port_status(struct mlx5_core_dev *dev, u8 *status); +int mlx5_query_port_admin_status(struct mlx5_core_dev *dev, + enum mlx5_port_status *status); +int mlx5_set_port_pause(struct mlx5_core_dev *dev, u32 port, + u32 rx_pause, u32 tx_pause); +int mlx5_query_port_pause(struct mlx5_core_dev *dev, u32 port, + u32 *rx_pause, u32 *tx_pause); +int mlx5_set_port_pfc(struct mlx5_core_dev *dev, u8 pfc_en_tx, u8 pfc_en_rx); +int mlx5_query_port_pfc(struct mlx5_core_dev *dev, u8 *pfc_en_tx, u8 *pfc_en_rx); + +int mlx5_set_port_mtu(struct mlx5_core_dev *dev, int mtu); +int mlx5_query_port_max_mtu(struct mlx5_core_dev *dev, int *max_mtu); +int mlx5_query_port_oper_mtu(struct mlx5_core_dev *dev, int *oper_mtu); + +unsigned int mlx5_query_module_status(struct mlx5_core_dev *dev, int module_num); +int mlx5_query_module_num(struct mlx5_core_dev *dev, int *module_num); +int mlx5_query_eeprom(struct mlx5_core_dev *dev, int i2c_addr, int page_num, + int device_addr, int size, int module_num, u32 *data, + int *size_read); + +#endif /* __MLX5_PORT_H__ */
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