Date: Mon, 9 Feb 2015 15:31:31 +0000 From: "imp (Warner Losh)" <phabric-noreply@FreeBSD.org> To: freebsd-arm@freebsd.org Subject: [Differential] [Accepted] D1812: Resolve cache line size from CP15 Message-ID: <65fc7b23f5f4e603cfa70170a5ca9de1@localhost.localdomain> In-Reply-To: <differential-rev-PHID-DREV-conagpb5joeuzmkcxv34-req@FreeBSD.org> References: <differential-rev-PHID-DREV-conagpb5joeuzmkcxv34-req@FreeBSD.org>
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imp added a subscriber: imp. imp accepted this revision. imp added a reviewer: imp. imp added a comment. This revision is now accepted and ready to land. This looks good to me... Please commit. Extra bonus points if you KASSERT at some early time during the init if USB_HOST_ALIGN is smaller than arm_dcache_line_size. REVISION DETAIL https://reviews.freebsd.org/D1812 To: zbb, ian, andrew, imp Cc: imp, freebsd-arm
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