Date: Thu, 19 Apr 2001 23:47:12 -0700 From: "Charles Burns" <burnscharlesn@hotmail.com> To: vince@oahu.WURLDLINK.NET, lplist@closedsrc.org Cc: jgowdy@home.com, kris@obsecurity.org, mwlist@lanfear.com, freebsd@sysmach.com, questions@FreeBSD.ORG Subject: Re: the AMD factor in FreeBSD Message-ID: <F84TvJHNA5FC39nl6gv00004afb@hotmail.com>
next in thread | raw e-mail | index | archive | help
> Interesting. I guess I never read about how AMD did it... I just >remember reading a comparison of the Pentium versus the PowerPC 603 I >think and it somehow gave the indication that Intel CPU's were CISC >with RISC and the PowerPC was 100% RISC. What is 100% RISC though? RISC has become something of a marketing term that has died but still lives on in the memories of those who were caught up in it. RISC clasically means that the chip has less instructions and that they are simpler. Less and simpler than what? There is apparently more to all of this and I am still recovering from Mike Meyer's comments Everyone should read this article: http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html This should help quite a bit. > > In reality... the x86 processors and, what people tend to call, RISC > > processors now are really post-RISC. Trying to expand IPC and increase > > Mhz :) Intel went the opposite with the P4. > > True but speaking about AMD, PIII and the likes, where does the >Xeon fit in? Xeon is simply a P2 or P3 that has lots of on-chip cache memory and is extremely overpriced. Theoretically this cache memory helps greatly with software such as Oracle, but I can't see it more than making up for the huge clockspeed penalty that Xeon's have. (They are always of a lower clockspeed than P3s) Xeon's also have the artificial multiprocessing cap set higher, or so I have heard, so that you can use 8 in a machine rather than just 2. Has enybody tested this? I have never heard of anybody putting 8 P3s into a motherboard. I wonder if it is Intel marketing rather than a real limit because it seems that it would be difficult to manually limit a CPU to only work with so many others. Because the ASIC chips deal with most fo the SMP stuff--how would the P3 really know whether it was in a 2-way or 8-way system? I don't have the money to test this out. If anybody would, I would be greatful to have this question answered. _________________________________________________________________ Get your FREE download of MSN Explorer at http://explorer.msn.com To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-questions" in the body of the message
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?F84TvJHNA5FC39nl6gv00004afb>