From owner-cvs-all@FreeBSD.ORG Fri Oct 28 16:39:51 2005 Return-Path: X-Original-To: cvs-all@freebsd.org Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 80A9516A420; Fri, 28 Oct 2005 16:39:51 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from harmony.bsdimp.com (vc4-2-0-87.dsl.netrack.net [199.45.160.85]) by mx1.FreeBSD.org (Postfix) with ESMTP id 0B6F743D45; Fri, 28 Oct 2005 16:39:50 +0000 (GMT) (envelope-from imp@bsdimp.com) Received: from localhost (localhost.village.org [127.0.0.1] (may be forged)) by harmony.bsdimp.com (8.13.3/8.13.3) with ESMTP id j9SGbAPk059861; Fri, 28 Oct 2005 10:37:10 -0600 (MDT) (envelope-from imp@bsdimp.com) Date: Fri, 28 Oct 2005 10:37:09 -0600 (MDT) Message-Id: <20051028.103709.74689710.imp@bsdimp.com> To: glebius@freebsd.org From: Warner Losh In-Reply-To: <20051028160218.GJ41520@cell.sick.ru> References: <200510261648.27126.peter@wemm.org> <200510281041.44147.jhb@freebsd.org> <20051028160218.GJ41520@cell.sick.ru> X-Mailer: Mew version 3.3 on Emacs 21.3 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-2.0 (harmony.bsdimp.com [127.0.0.1]); Fri, 28 Oct 2005 10:37:10 -0600 (MDT) Cc: src-committers@freebsd.org, jhb@freebsd.org, peter@wemm.org, cvs-src@freebsd.org, cvs-all@freebsd.org, linimon@lonesome.com Subject: Re: cvs commit: src/sys/alpha/alpha interrupt.c src/sys/alpha/isa isa.c src/sys/amd64/amd64 intr_machdep.c src/sys/amd64/include intr_machdep.h src/sys/amd64/isa atpic.c src/sys/arm/arm intr.c src/sys/dev/sio sio.c src/sys/dev/uart uart_kbd_sun.c uart_tty.c ... X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 28 Oct 2005 16:39:51 -0000 From: Gleb Smirnoff Subject: Re: cvs commit: src/sys/alpha/alpha interrupt.c src/sys/alpha/isa isa.c src/sys/amd64/amd64 intr_machdep.c src/sys/amd64/include intr_machdep.h src/sys/amd64/isa atpic.c src/sys/arm/arm intr.c src/sys/dev/sio sio.c src/sys/dev/uart uart_kbd_sun.c uart_tty.c ... Date: Fri, 28 Oct 2005 20:02:18 +0400 > John, > > On Fri, Oct 28, 2005 at 10:41:42AM -0400, John Baldwin wrote: > J> > Of course the real challenge is to make things like the puc device do > J> > the right thing automatically instead of needing 'options > J> > PUC_FASTINTR'. > J> > J> You mean like sio(4) tried to? The problem is that with the previosu code if > J> sio(4) went first, it would register INTR_FAST and some later PCI device > J> wouldn't be able to register its interrupt. There's not an easy solution to > J> that problem if you want to keep the semantics that INTR_FAST implies > J> INTR_EXCL. > > is it possible to implement such a feature that driver requests INTR_FAST > and it succeds only and only if interrupt isn't shared? Not really. The problem is that you don't know it is shared until it is too late. You have no way of really knowing if a device uses interrupts until its driver attaches and requests an interrupt. Given how we do our device probing, there's not really a chance to 'downgrade' the FAST to non-FAST later with driver notification (we can trivially downgrade what we do to ithread, but then the driver might not actually work). Warner