Date: Mon, 25 May 2009 06:39:48 +0000 (UTC) From: Pyun YongHyeon <yongari@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r192731 - head/sys/dev/msk Message-ID: <200905250639.n4P6dmrt013670@svn.freebsd.org>
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Author: yongari Date: Mon May 25 06:39:48 2009 New Revision: 192731 URL: http://svn.freebsd.org/changeset/base/192731 Log: Explicitly reset GMAC Controls and initialize GM_GP_CTRL register. The GM_GP_CTRL register may have stale content from previous link information so clearing it will make hardware update the register correctly when it established a valid link. While I'm here remove stale comment. Modified: head/sys/dev/msk/if_msk.c Modified: head/sys/dev/msk/if_msk.c ============================================================================== --- head/sys/dev/msk/if_msk.c Mon May 25 06:36:02 2009 (r192730) +++ head/sys/dev/msk/if_msk.c Mon May 25 06:39:48 2009 (r192731) @@ -3535,18 +3535,16 @@ msk_init_locked(struct msk_if_softc *sc_ ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TXCSUM); } + /* GMAC Control reset. */ + CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), GMC_RST_SET); + CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), GMC_RST_CLR); + CSR_WRITE_4(sc, MR_ADDR(sc_if->msk_port, GMAC_CTRL), GMC_F_LOOPB_OFF); + /* - * Initialize GMAC first. - * Without this initialization, Rx MAC did not work as expected - * and Rx MAC garbled status LEs and it resulted in out-of-order - * or duplicated frame delivery which in turn showed very poor - * Rx performance.(I had to write a packet analysis code that - * could be embeded in driver to diagnose this issue.) - * I've spent almost 2 months to fix this issue. If I have had - * datasheet for Yukon II I wouldn't have encountered this. :-( + * Initialize GMAC first such that speed/duplex/flow-control + * parameters are renegotiated when interface is brought up. */ - gmac = GM_GPCR_SPEED_100 | GM_GPCR_SPEED_1000 | GM_GPCR_DUP_FULL; - GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, gmac); + GMAC_WRITE_2(sc, sc_if->msk_port, GM_GP_CTRL, 0); /* Dummy read the Interrupt Source Register. */ CSR_READ_1(sc, MR_ADDR(sc_if->msk_port, GMAC_IRQ_SRC));
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