From owner-freebsd-toolchain@FreeBSD.ORG Fri Jun 10 02:42:38 2011 Return-Path: Delivered-To: toolchain@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 42595106566C for ; Fri, 10 Jun 2011 02:42:38 +0000 (UTC) (envelope-from marcel@xcllnt.net) Received: from mail.xcllnt.net (mail.xcllnt.net [70.36.220.4]) by mx1.freebsd.org (Postfix) with ESMTP id 15F3F8FC15 for ; Fri, 10 Jun 2011 02:42:37 +0000 (UTC) Received: from sa-nc-it-231.static.jnpr.net (natint3.juniper.net [66.129.224.36]) (authenticated bits=0) by mail.xcllnt.net (8.14.4/8.14.4) with ESMTP id p5A2K9cf065183 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NO); Thu, 9 Jun 2011 19:20:15 -0700 (PDT) (envelope-from marcel@xcllnt.net) From: Marcel Moolenaar Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Date: Thu, 9 Jun 2011 19:20:04 -0700 Message-Id: To: Roman Divacky Mime-Version: 1.0 (Apple Message framework v1084) X-Mailer: Apple Mail (2.1084) Cc: toolchain@freebsd.org Subject: llvm-ia64 is off the ground... X-BeenThere: freebsd-toolchain@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Maintenance of FreeBSD's integrated toolchain List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Jun 2011 02:42:38 -0000 [CC toolchain@ -- more eyes is probably better] Hi Roman, I created the projects branch and committed a skeletal target for ia64 that's based on MSP430. I also discovered that CLang needs some target info, so I added that too. The branch is: projects/llvm-ia64 When you have time, feel free to go over it and critique what I've done. My next steps are simple: Fix whatever blocks me from making progress: ns1% cat ~/incr.c int incr(int x) { return (x + 1); } ns1% clang -ccc-host-triple ia64 -S ~/incr.c 'generic' is not a recognized processor for this target (ignoring processor) error: unable to interface with target machine 1 error generated. (The target defines generic as the default subtarget, but I didn't add that to IA64.td. I added CPU implementations as a test case. I just need to match things up) -- Marcel Moolenaar marcel@xcllnt.net