From owner-svn-src-stable-12@freebsd.org Fri Oct 23 10:48:15 2020 Return-Path: Delivered-To: svn-src-stable-12@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 38FF1443185; Fri, 23 Oct 2020 10:48:15 +0000 (UTC) (envelope-from freqlabs@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4CHgtl0pfPz3ybW; Fri, 23 Oct 2020 10:48:15 +0000 (UTC) (envelope-from freqlabs@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 0037B264A4; Fri, 23 Oct 2020 10:48:15 +0000 (UTC) (envelope-from freqlabs@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 09NAmEi4090392; Fri, 23 Oct 2020 10:48:14 GMT (envelope-from freqlabs@FreeBSD.org) Received: (from freqlabs@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 09NAmEW8090391; Fri, 23 Oct 2020 10:48:14 GMT (envelope-from freqlabs@FreeBSD.org) Message-Id: <202010231048.09NAmEW8090391@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: freqlabs set sender to freqlabs@FreeBSD.org using -f From: Ryan Moeller Date: Fri, 23 Oct 2020 10:48:14 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r366965 - stable/12/usr.sbin/bhyve X-SVN-Group: stable-12 X-SVN-Commit-Author: freqlabs X-SVN-Commit-Paths: stable/12/usr.sbin/bhyve X-SVN-Commit-Revision: 366965 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-12@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: SVN commit messages for only the 12-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 23 Oct 2020 10:48:15 -0000 Author: freqlabs Date: Fri Oct 23 10:48:14 2020 New Revision: 366965 URL: https://svnweb.freebsd.org/changeset/base/366965 Log: MFC r366771: bhyve: Update TX descriptor base address and host mapping on change bhyve sometimes segfaults when using an e1000 NIC with a Windows guest. We are only updating our tdba and cached host mapping when the low address register is written and when tx is set enabled, but not when the high address or length registers are written. It is observed that Windows 10 is occasionally enabling tx first then writing the registers in the order low, high, len. This leaves us with a bogus base address and mapping, which causes a segfault later when we try to copy from a descriptor that has unpredictable garbage in a pointer. Updating the address and mapping when any of those registers change seems to fix that particular issue. Reviewed by: mav, grehan (bhyve) Sponsored by: iXsystems, Inc. Differential Revision: https://reviews.freebsd.org/D26798 Modified: stable/12/usr.sbin/bhyve/pci_e82545.c Directory Properties: stable/12/ (props changed) Modified: stable/12/usr.sbin/bhyve/pci_e82545.c ============================================================================== --- stable/12/usr.sbin/bhyve/pci_e82545.c Fri Oct 23 10:24:37 2020 (r366964) +++ stable/12/usr.sbin/bhyve/pci_e82545.c Fri Oct 23 10:48:14 2020 (r366965) @@ -1699,18 +1699,18 @@ e82545_write_register(struct e82545_softc *sc, uint32_ break; case E1000_TDBAL(0): sc->esc_TDBAL = value & ~0xF; - if (sc->esc_tx_enabled) { - /* Apparently legal */ + if (sc->esc_tx_enabled) e82545_tx_update_tdba(sc); - } break; case E1000_TDBAH(0): - //assert(!sc->esc_tx_enabled); sc->esc_TDBAH = value; + if (sc->esc_tx_enabled) + e82545_tx_update_tdba(sc); break; case E1000_TDLEN(0): - //assert(!sc->esc_tx_enabled); sc->esc_TDLEN = value & ~0xFFF0007F; + if (sc->esc_tx_enabled) + e82545_tx_update_tdba(sc); break; case E1000_TDH(0): //assert(!sc->esc_tx_enabled);