From owner-svn-src-head@FreeBSD.ORG Tue Jun 17 18:32:35 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 51AE610E; Tue, 17 Jun 2014 18:32:35 +0000 (UTC) Received: from gromit.grondar.org (grandfather.grondar.org [IPv6:2a01:348:0:15:5d59:5c20:0:2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 0FF0E2D80; Tue, 17 Jun 2014 18:32:35 +0000 (UTC) Received: from [2001:470:9174:1:6420:552d:97a0:2395] by gromit.grondar.org with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.80.1 (FreeBSD)) (envelope-from ) id 1WwyBD-000L7H-KI; Tue, 17 Jun 2014 19:32:32 +0100 Subject: Re: svn commit: r266083 - in head/sys/arm: arm include Mime-Version: 1.0 (Mac OS X Mail 7.3 \(1878.2\)) Content-Type: text/plain; charset=windows-1252 From: Mark R V Murray In-Reply-To: <1F3FE585-4C04-499E-86CE-BA4DC3F05D97@freebsd.org> Date: Tue, 17 Jun 2014 19:33:36 +0100 Content-Transfer-Encoding: quoted-printable Message-Id: <7124948D-6F58-4E01-AA61-E381AC223F39@FreeBSD.org> References: <201405141911.s4EJBFZZ097826@svn.freebsd.org> <537D0952.2040001@selasky.org> <7610C8E6-3F01-4317-BC1A-67645A162CD7@FreeBSD.org> <53871493.2010502@selasky.org> <9412A358-EBCB-4A5A-B728-2A15C50FC217@fh-muenster.de> <9B438991-C970-46A7-8116-A490E02D7139@fh-muenster.de> <3841D090-5973-40B0-B61C-F15E8C1978C9@FreeBSD.org> <3664DBD3-7CEA-43E8-9757-E835BB21FE9E@freebsd.org> <5F36DFA5-C5B1-4E5D-88EE-9D60240B40FD@FreeBSD.org> <494BE7DA-26BC-43A7-8BC0-ECAE8A75E1EF@freebsd.org> <6268E444-F6C7-4B8B-86B7-244A2BB3C4DE@FreeBSD.org> <44F7EEB4-46D1-49C7-A4CA-4EA5D41BDF31@freebsd.org> <1F3FE585-4C04-499E-86CE-BA4DC3F05D97@freebsd.org> To: Michael Tuexen X-Mailer: Apple Mail (2.1878.2) X-SA-Score: -1.0 Cc: Hans Petter Selasky , svn-src-head@freebsd.org, svn-src-all@freebsd.org, src-committers@freebsd.org X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.18 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 17 Jun 2014 18:32:35 -0000 Hi Michael, If that works, then Brilliant! :-) :-) Could you please fix this so the _PMC_USER_READ_WRITE_ is all in one = place (it=92s too dangerous to split up), and put an = architecture-specific #ifdef around just the MCR instruction we care = about. With that, its good to commit, I=92d say. I=92ll likely follow up and = exclude the architectures that are unproven. M On 17 Jun 2014, at 10:52, Michael Tuexen wrote: > On 16 Jun 2014, at 22:13, Mark R V Murray wrote: > Hi Mark, >=20 > I just adopted the comments to the code change. So here is the = improved patch: >=20 > Index: cpufunc.c > =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D > --- cpufunc.c (revision 267575) > +++ cpufunc.c (working copy) > @@ -1404,18 +1404,36 @@ > static __inline void > cpu_scc_setup_ccnt(void) > { > -/* This is how you give userland access to the CCNT and PMCn > - * registers. > - * BEWARE! This gives write access also, which may not be what > - * you want! > - */ > +#if defined(CPU_ARM1136) || defined(CPU_ARM1176) > #ifdef _PMC_USER_READ_WRITE_ > - /* Set PMUSERENR[0] to allow userland access */ > + /* This is how you give userland access to the CCNT and PMCn > + * registers. > + * BEWARE! This gives write access also, which may not be what > + * you want! > + * Use the Secure User and Non-secure Access Validation Control = Register > + * to allow userland access=20 > + */ > + __asm volatile ("mcr p15, 0, %0, c15, c9, 0\n\t" > + : > + : "r"(0x00000001)); > +#endif > + /* Set PMCR[2,0] to enable counters and reset CCNT */ > + __asm volatile ("mcr p15, 0, %0, c15, c12, 0\n\t" > + : > + : "r"(0x00000005)); > +#else > +#ifdef _PMC_USER_READ_WRITE_ > + /* This is how you give userland access to the CCNT and PMCn > + * registers. > + * BEWARE! This gives write access also, which may not be what > + * you want! > + * Set PMUSERENR[0] to allow userland access > + */ > __asm volatile ("mcr p15, 0, %0, c9, c14, 0\n\t" > : > : "r"(0x00000001)); > #endif > - /* Set up the PMCCNTR register as a cyclecounter: > + /* Set up the PMCCNTR register as a cyclecounter: > * Set PMINTENCLR to 0xFFFFFFFF to block interrupts > * Set PMCR[2,0] to enable counters and reset CCNT > * Set PMCNTENSET to 0x80000000 to enable CCNT */ > @@ -1426,6 +1444,7 @@ > : "r"(0xFFFFFFFF), > "r"(0x00000005), > "r"(0x80000000)); > +#endif > } > #endif >=20 > Let me know if I can help. >=20 > Best regards > Michael >>=20 >> On 16 Jun 2014, at 20:38, Michael Tuexen wrote: >>> Hmm, the documentation reads >>=20 >> Which docs are you using? >>=20 >> I=92m using DDI0360F. (And that could easily be a wrong choice). >>=20 >> M >> --=20 >> Mark R V Murray >>=20 >>=20 >=20 --=20 Mark R V Murray