From owner-freebsd-current Mon Jun 26 12:33: 4 2000 Delivered-To: freebsd-current@freebsd.org Received: from khavrinen.lcs.mit.edu (khavrinen.lcs.mit.edu [18.24.4.193]) by hub.freebsd.org (Postfix) with ESMTP id B633D37BCAC; Mon, 26 Jun 2000 12:32:58 -0700 (PDT) (envelope-from wollman@khavrinen.lcs.mit.edu) Received: (from wollman@localhost) by khavrinen.lcs.mit.edu (8.9.3/8.9.3) id PAA70567; Mon, 26 Jun 2000 15:31:32 -0400 (EDT) (envelope-from wollman) Date: Mon, 26 Jun 2000 15:31:32 -0400 (EDT) From: Garrett Wollman Message-Id: <200006261931.PAA70567@khavrinen.lcs.mit.edu> To: Nick Hibma Cc: Mike Smith , FreeBSD CURRENT Mailing List Subject: Re: irunning, width in bits. In-Reply-To: References: <200006260823.BAA00624@mass.osd.bsdi.com> Sender: owner-freebsd-current@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG < said: > I guess that the perfect solution is to be able to hardwire the PCI irqs > in some way once FreeBSD is doing the PnP resource allocation. On typical non-SMP motherboards, the PCI IRQs are hard-wired on the motherboard. That is to say, INTA of slot 13 is wire-OR'd with INTB of slot 14, is wire-OR'd with INTC of slot 15, is wire-OR'd with INTD of slot 16, and oh, yeah, is also wire-OR'd with INTA of every on-motherboard device. SMP motherboards tend to be significantly better in this regard. The PCI BIOS includes a function which gives you the map of how interrupts are wired together. -GAWollman -- Garrett A. Wollman | O Siem / We are all family / O Siem / We're all the same wollman@lcs.mit.edu | O Siem / The fires of freedom Opinions not those of| Dance in the burning flame MIT, LCS, CRS, or NSA| - Susan Aglukark and Chad Irschick To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-current" in the body of the message