Date: Fri, 6 Mar 2020 21:07:05 +0900 (JST) From: Mori Hiroki <yamori813@yahoo.co.jp> To: "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org> Subject: Re: A10 HDMI support Message-ID: <899170752.2669767.1583496425789.JavaMail.yahoo@mail.yahoo.co.jp> In-Reply-To: <374090886.2770800.1583491536027.JavaMail.yahoo@mail.yahoo.co.jp> References: <1989879823.835082.1583057147228.JavaMail.yahoo.ref@mail.yahoo.co.jp> <1989879823.835082.1583057147228.JavaMail.yahoo@mail.yahoo.co.jp> <2128278973.2661650.1583474156629.JavaMail.yahoo@mail.yahoo.co.jp> <374090886.2770800.1583491536027.JavaMail.yahoo@mail.yahoo.co.jp>
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Hi
A10 and A20=C2=A0CLK_PLL_VIDEO0 is PLL3.
PLL3 is 3000000(3M) step.
But minimam is 27M(x9).
222M is just x74.
aw_clk_frac.c is miss calculate clock.
----- Original Message -----
> From: Mori Hiroki <yamori813@yahoo.co.jp>
> To: "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org>
> Cc:=20
> Date: 2020/3/6, Fri 19:45
> Subject: Re: A10 HDMI support
>=20
> Hi
>=20
> I test this code.
>=20
> error =3D clk_set_freq(clk_vid,=C2=A0222000000, CLK_SET_ROUND_DOWN);
> error =3D clk_get_freq(clk_vid, &lcd_fout);
> device_printf(sc->dev, "MORI MORI freq=C2=A0CLK_PLL_VIDEO0 %llu\n",=20
> lcd_fout);
>=20
> Result is this.
>=20
> fb0: MORI MORI freq=C2=A0CLK_PLL_VIDEO0=C2=A0240000000
>=20
> clkng is not work=C2=A0correctly.
>=20
> ----- Original Message -----
>> From: Mori Hiroki <yamori813@yahoo.co.jp>
>> To: "freebsd-arm@freebsd.org" <freebsd-arm@freebsd.org>
>> Cc:=20
>> Date: 2020/3/6, Fri 14:55
>> Subject: Re: A10 HDMI support
>>=20
>> Hi
>>=20
>> I seem clkng don't have this method.
>>=20
>>=20
>> #define TCON_PLL_WORST =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A01000000
>> #define TCON_PLL_N_MIN =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A01
>> #define TCON_PLL_N_MAX =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A015
>> #define TCON_PLL_M_MIN =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A09
>> #define TCON_PLL_M_MAX =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0127
>> #define TCON_PLLREF_SINGLE =C2=A0 =C2=A0 =C2=A03000 =C2=A0 =C2=A0/* kHz=
*/
>> #define TCON_PLLREF_DOUBLE =C2=A0 =C2=A0 =C2=A06000 =C2=A0 =C2=A0/* kHz=
*/
>> #define TCON_RATE_KHZ(rate_hz) =C2=A0((rate_hz) / 1000)
>> #define TCON_RATE_HZ(rate_khz) =C2=A0((rate_khz) * 1000)
>> #define HDMI_DEFAULT_RATE =C2=A0 =C2=A0 =C2=A0 297000000
>> #define DEBE_DEFAULT_RATE =C2=A0 =C2=A0 =C2=A0 300000000
>>=20
>> static void
>> calc_tcon_pll(int f_ref, int f_out, int *pm, int *pn)
>> {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 int best, m, n, f_cur, diff;
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 best =3D TCON_PLL_WORST;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 for (n =3D TCON_PLL_N_MIN; n <=3D TCON_PLL_=
N_MAX; n++) {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 for (m =3D TCON=
_PLL_M_MIN; m <=3D TCON_PLL_M_MAX; m++) {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 f_cur =3D (m * f_ref) / n;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 diff =3D f_out - f_cur;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 if (diff > 0 && diff < best) {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 best =3D diff;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 *pm =3D m;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 *pn =3D n;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 }
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
>> }
>>=20
>> int
>> a10_clk_tcon_activate(unsigned int freq)
>> {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 struct a10_ccm_softc *sc;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 int m, n, m2, n2, f_single, f_double, dbl, =
src_sel;
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 sc =3D a10_ccm_sc;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (sc =3D=3D NULL)
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return (ENXIO);
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 m =3D n =3D m2 =3D n2 =3D 0;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 dbl =3D 0;
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 calc_tcon_pll(TCON_PLLREF_SINGLE, TCON_RATE=
_KHZ(freq), &m,=20
> &n);
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 calc_tcon_pll(TCON_PLLREF_DOUBLE, TCON_RATE=
_KHZ(freq), &m2,=20
>> &n2);
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 f_single =3D n ? (m * TCON_PLLREF_SINGLE) /=
n : 0;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 f_double =3D n2 ? (m2 * TCON_PLLREF_DOUBLE)=
/ n2 : 0;
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (f_double > f_single) {
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 dbl =3D 1;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 m =3D m2;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 n =3D n2;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 src_sel =3D dbl ? CCM_LCD_CH1_SRC_SEL_PLL3_=
2X :=20
> CCM_LCD_CH1_SRC_SEL_PLL3;
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (n =3D=3D 0 || m =3D=3D 0)
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 return (EINVAL)=
;
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Set PLL3 to the closest possible rate */
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 a10_clk_pll3_set_rate(TCON_RATE_HZ(m * TCON=
_PLLREF_SINGLE));
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 /* Enable LCD0 CH1 clock */
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 ccm_write_4(sc, CCM_LCD0_CH1_CLK,
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 CCM_LCD_CH1_SCLK2_GATING | CC=
M_LCD_CH1_SCLK1_GATING |
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 (src_sel << CCM_LCD_CH1_SRC_S=
EL_SHIFT) | (n - 1));
>>=20
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 return (0);
>> }
>> ----- Original Message -----
>>> =C2=A0 From: Mori Hiroki <yamori813@yahoo.co.jp>
>>> =C2=A0 To: "freebsd-arm@freebsd.org"=20
> <freebsd-arm@freebsd.org>
>>> =C2=A0 Cc:=20
>>> =C2=A0 Date: 2020/3/1, Sun 19:05
>>> =C2=A0 Subject: A10 HDMI support
>>>=20
>>> =C2=A0 Hi
>>>=20
>>> =C2=A0 I have A10 PCduino.=C2=A0
>>>=20
>>> =C2=A0 I try to use a10_hdmi.c and a10_fb.c
>>>=20
>>> =C2=A0 This code may be work at first implementation
>>> =C2=A0 at 2016.=C2=A0
>>>=20
>>> =C2=A0 But change to dts away modify and chkng change
>>> =C2=A0 complete broken this code.
>>>=20
>>> =C2=A0 I modify dts and code on 12-Stable then almost
>>> =C2=A0 detect. But not work.
>>>=20
>>> =C2=A0 http://dmesgd.nycbug.org/index.cgi?do=3Dview&id=3D5402=20
>>>=20
>>>=20
>>> =C2=A0 Dose some body repair this code?
>>>=20
>>> =C2=A0 Thanks
>>>=20
>>> =C2=A0 Hiroki Mori
>>>=20
>>> =C2=A0 _______________________________________________
>>> =C2=A0 freebsd-arm@freebsd.org mailing list
>>> =C2=A0 https://lists.freebsd.org/mailman/listinfo/freebsd-arm=20
>>> =C2=A0 To unsubscribe, send any mail to=20
>> "freebsd-arm-unsubscribe@freebsd.org"
>>>=20
>>=20
>> _______________________________________________
>> freebsd-arm@freebsd.org mailing list
>> https://lists.freebsd.org/mailman/listinfo/freebsd-arm=20
>> To unsubscribe, send any mail to=20
> "freebsd-arm-unsubscribe@freebsd.org"
>>=20
>=20
> _______________________________________________
> freebsd-arm@freebsd.org mailing list
> https://lists.freebsd.org/mailman/listinfo/freebsd-arm=20
> To unsubscribe, send any mail to "freebsd-arm-unsubscribe@freebsd.org"
>=20
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