Date: Wed, 8 Apr 2009 01:20:05 GMT From: Kazuo Dohzono <dohzono@gmail.com> To: freebsd-x11@FreeBSD.org Subject: Re: ports/133465: x11/xorg: X crashes with mplayer -vo xv with xf86-video-intel [regression] Message-ID: <200904080120.n381K5e0007185@freefall.freebsd.org>
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The following reply was made to PR ports/133465; it has been noted by GNATS. From: Kazuo Dohzono <dohzono@gmail.com> To: bug-followup@FreeBSD.org, dohzono@gmail.com Cc: Subject: Re: ports/133465: x11/xorg: X crashes with mplayer -vo xv with xf86-video-intel [regression] Date: Wed, 8 Apr 2009 10:16:08 +0900 I downdated xf86-video-intel-2.5.1 (make PORTVERION=2.5.1). > 1) X's default background gray-scale pattern > disappeared (as if I executed "xsetroot -solid black"). > mlterm/twm works OK. This doesn't change. This may be a server-side/base-system issue. > 2) mplayer -vo xv doesn't work (it worked fine with > xf86-video-intel-1.5.*). console black outs (It seems that Alt+Fn > switching is working without any display output). And memory usage > is added to Xorg.0.log (after mplayer is executed, perhaps). mplayer works. This must be a driver issue. Here is a diff of Xorg.0.log from 2.5.1 to 2.6.3. | *** Xorg.0.log Wed Apr 8 09:52:50 2009 | --- Xorg.0.log.old Wed Apr 8 00:04:52 2009 | *************** | *** 11,17 **** | Markers: (--) probed, (**) from config file, (==) default setting, | (++) from command line, (!!) notice, (II) informational, | (WW) warning, (EE) error, (NI) not implemented, (??) unknown. | ! (==) Log file: "/var/log/Xorg.0.log", Time: Wed Apr 8 09:45:36 2009 | (==) Using config file: "/etc/X11/xorg.conf" | (==) ServerLayout "Simple Layout" | (**) |-->Screen "Screen 1" (0) | --- 11,17 ---- | Markers: (--) probed, (**) from config file, (==) default setting, | (++) from command line, (!!) notice, (II) informational, | (WW) warning, (EE) error, (NI) not implemented, (??) unknown. | ! (==) Log file: "/var/log/Xorg.0.log", Time: Tue Apr 7 23:53:13 2009 | (==) Using config file: "/etc/X11/xorg.conf" | (==) ServerLayout "Simple Layout" | (**) |-->Screen "Screen 1" (0) | *************** | *** 116,122 **** | (II) LoadModule: "intel" | (II) Loading /usr/local/lib/xorg/modules/drivers//intel_drv.so | (II) Module intel: vendor="X.Org Foundation" | ! compiled for 1.6.0, module version = 2.5.1 | Module class: X.Org Video Driver | ABI class: X.Org Video Driver, version 5.0 | (II) LoadModule: "mouse" | --- 116,122 ---- | (II) LoadModule: "intel" | (II) Loading /usr/local/lib/xorg/modules/drivers//intel_drv.so | (II) Module intel: vendor="X.Org Foundation" | ! compiled for 1.6.0, module version = 2.6.3 | Module class: X.Org Video Driver | ABI class: X.Org Video Driver, version 5.0 | (II) LoadModule: "mouse" | *************** | *** 193,205 **** | (II) intel(0): DPLL_TEST: 0x00010001 () | (II) intel(0): CACHE_MODE_0: 0x00006800 | (II) intel(0): D_STATE: 0x00000000 | ! (II) intel(0): DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) | ! (II) intel(0): RENCLK_GATE_D1: 0x00000000 | (II) intel(0): RENCLK_GATE_D2: 0x00000000 | (II) intel(0): SDVOB: 0x0008001c (disabled, pipe A, stall disabled, | detected) | (II) intel(0): SDVOC: 0x00080018 (disabled, pipe A, stall disabled, | not detected) | (II) intel(0): SDVOUDI: 0x00000000 | ! (II) intel(0): DSPARB: 0x00001d9c | (II) intel(0): DSPFW1: 0x3f8f0f0f | (II) intel(0): DSPFW2: 0x00000f0f | (II) intel(0): DSPFW3: 0x00000000 | --- 193,205 ---- | (II) intel(0): DPLL_TEST: 0x00010001 () | (II) intel(0): CACHE_MODE_0: 0x00006800 | (II) intel(0): D_STATE: 0x00000000 | ! (II) intel(0): DSPCLK_GATE_D: 0x00000000 (clock gates disabled:) | ! (II) intel(0): RENCLK_GATE_D1: 0x20000000 | (II) intel(0): RENCLK_GATE_D2: 0x00000000 | (II) intel(0): SDVOB: 0x0008001c (disabled, pipe A, stall disabled, | detected) | (II) intel(0): SDVOC: 0x00080018 (disabled, pipe A, stall disabled, | not detected) | (II) intel(0): SDVOUDI: 0x00000000 | ! (II) intel(0): DSPARB: 0x00003f80 | (II) intel(0): DSPFW1: 0x3f8f0f0f | (II) intel(0): DSPFW2: 0x00000f0f | (II) intel(0): DSPFW3: 0x00000000 | *************** | *** 216,261 **** | (II) intel(0): PP_ON_DELAYS: 0x012c0fff | (II) intel(0): PP_OFF_DELAYS: 0x00fa07d0 | (II) intel(0): PP_DIVISOR: 0x003e7f07 | ! (II) intel(0): PFIT_CONTROL: 0xa0000000 | (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | ! (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) | ! (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) | (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | (II) intel(0): DSPABASE: 0x00000000 | ! (II) intel(0): DSPASURF: 0x00000000 | (II) intel(0): DSPATILEOFF: 0x00000000 | (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | ! (II) intel(0): PIPEASTAT: 0x00000203 (status: VSYNC_INT_STATUS | VBLANK_INT_STATUS OREG_UPDATE_STATUS) | ! (II) intel(0): FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) | (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | ! (II) intel(0): DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default | clock, DAC/serial mode, p1 = 8, p2 = 10) | ! (II) intel(0): DPLL_A_MD: 0x00000303 | ! (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) | ! (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) | ! (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) | ! (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) | ! (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) | ! (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) | (II) intel(0): BCLRPAT_A: 0x00000000 | (II) intel(0): VSYNCSHIFT_A: 0x00000000 | ! (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) | ! (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) | (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | (II) intel(0): DSPBBASE: 0x00000000 | ! (II) intel(0): DSPBSURF: 0x00000000 | (II) intel(0): DSPBTILEOFF: 0x00000000 | (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | ! (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) | ! (II) intel(0): PIPEBSTAT: 0x80000206 (status: FIFO_UNDERRUN | VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS) | ! (II) intel(0): FPB0: 0x00021509 (n = 2, m1 = 21, m2 = 9) | (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | ! (II) intel(0): DPLL_B: 0x99086a00 (enabled, non-dvo, spread spectrum | clock, LVDS mode, p1 = 4, p2 = 7) | ! (II) intel(0): DPLL_B_MD: 0x00000003 | (II) intel(0): HTOTAL_B: 0x06970577 (1400 active, 1688 total) | (II) intel(0): HBLANK_B: 0x06970577 (1400 start, 1688 end) | (II) intel(0): HSYNC_B: 0x061705a7 (1448 start, 1560 end) | --- 216,261 ---- | (II) intel(0): PP_ON_DELAYS: 0x012c0fff | (II) intel(0): PP_OFF_DELAYS: 0x00fa07d0 | (II) intel(0): PP_DIVISOR: 0x003e7f07 | ! (II) intel(0): PFIT_CONTROL: 0x00000000 | (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | ! (II) intel(0): DSPACNTR: 0x58000000 (disabled, pipe A) | ! (II) intel(0): DSPASTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | (II) intel(0): DSPABASE: 0x00000000 | ! (II) intel(0): DSPASURF: 0x0012b000 | (II) intel(0): DSPATILEOFF: 0x00000000 | (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | ! (II) intel(0): PIPEASTAT: 0x00000000 (status:) | ! (II) intel(0): FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8) | (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | ! (II) intel(0): DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, | DAC/serial mode, p1 = 8, p2 = 10) | ! (II) intel(0): DPLL_A_MD: 0x00000000 | ! (II) intel(0): HTOTAL_A: 0x033f027f (640 active, 832 total) | ! (II) intel(0): HBLANK_A: 0x033f027f (640 start, 832 end) | ! (II) intel(0): HSYNC_A: 0x02bf0297 (664 start, 704 end) | ! (II) intel(0): VTOTAL_A: 0x020701df (480 active, 520 total) | ! (II) intel(0): VBLANK_A: 0x020701df (480 start, 520 end) | ! (II) intel(0): VSYNC_A: 0x01ea01e8 (489 start, 491 end) | (II) intel(0): BCLRPAT_A: 0x00000000 | (II) intel(0): VSYNCSHIFT_A: 0x00000000 | ! (II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) | ! (II) intel(0): DSPBSTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | (II) intel(0): DSPBBASE: 0x00000000 | ! (II) intel(0): DSPBSURF: 0x0012b000 | (II) intel(0): DSPBTILEOFF: 0x00000000 | (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | ! (II) intel(0): PIPEBSRC: 0x05770419 (1400, 1050) | ! (II) intel(0): PIPEBSTAT: 0x00000206 (status: VSYNC_INT_STATUS | SVBLANK_INT_STATUS VBLANK_INT_STATUS) | ! (II) intel(0): FPB0: 0x00031406 (n = 3, m1 = 20, m2 = 6) | (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | ! (II) intel(0): DPLL_B: 0x99046c00 (enabled, non-dvo, spread spectrum | clock, LVDS mode, p1 = 3, p2 = 7) | ! (II) intel(0): DPLL_B_MD: 0x00000000 | (II) intel(0): HTOTAL_B: 0x06970577 (1400 active, 1688 total) | (II) intel(0): HBLANK_B: 0x06970577 (1400 start, 1688 end) | (II) intel(0): HSYNC_B: 0x061705a7 (1448 start, 1560 end) | *************** | *** 267,307 **** | (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | (II) intel(0): VCLK_POST_DIV: 0x00020002 | ! (II) intel(0): VGACNTRL: 0x22c4008e (enabled) | ! (II) intel(0): TV_CTL: 0x100000c0 | (II) intel(0): TV_DAC: 0x70000000 | ! (II) intel(0): TV_CSC_Y: 0x00000000 | ! (II) intel(0): TV_CSC_Y2: 0x00000000 | ! (II) intel(0): TV_CSC_U: 0x00000000 | ! (II) intel(0): TV_CSC_U2: 0x00000000 | ! (II) intel(0): TV_CSC_V: 0x00000000 | ! (II) intel(0): TV_CSC_V2: 0x00000000 | ! (II) intel(0): TV_CLR_KNOBS: 0x00000000 | ! (II) intel(0): TV_CLR_LEVEL: 0x00000000 | ! (II) intel(0): TV_H_CTL_1: 0x00000000 | ! (II) intel(0): TV_H_CTL_2: 0x00000000 | ! (II) intel(0): TV_H_CTL_3: 0x00000000 | ! (II) intel(0): TV_V_CTL_1: 0x00000000 | ! (II) intel(0): TV_V_CTL_2: 0x00000000 | ! (II) intel(0): TV_V_CTL_3: 0x00000000 | ! (II) intel(0): TV_V_CTL_4: 0x00000000 | ! (II) intel(0): TV_V_CTL_5: 0x00000000 | ! (II) intel(0): TV_V_CTL_6: 0x00000000 | ! (II) intel(0): TV_V_CTL_7: 0x00000000 | ! (II) intel(0): TV_SC_CTL_1: 0x00000000 | ! (II) intel(0): TV_SC_CTL_2: 0x00000000 | (II) intel(0): TV_SC_CTL_3: 0x00000000 | ! (II) intel(0): TV_WIN_POS: 0x00000000 | ! (II) intel(0): TV_WIN_SIZE: 0x00000000 | ! (II) intel(0): TV_FILTER_CTL_1: 0x00000000 | ! (II) intel(0): TV_FILTER_CTL_2: 0x00000000 | ! (II) intel(0): TV_FILTER_CTL_3: 0x00000000 | (II) intel(0): TV_CC_CONTROL: 0x00000000 | (II) intel(0): TV_CC_DATA: 0x00000000 | ! (II) intel(0): TV_H_LUMA_0: 0x00000000 | ! (II) intel(0): TV_H_LUMA_59: 0x00000000 | ! (II) intel(0): TV_H_CHROMA_0: 0x00000000 | ! (II) intel(0): TV_H_CHROMA_59: 0x00000000 | (II) intel(0): FBC_CFB_BASE: 0x00000000 | (II) intel(0): FBC_LL_BASE: 0x00000000 | (II) intel(0): FBC_CONTROL: 0x00000000 | --- 267,307 ---- | (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | (II) intel(0): VCLK_POST_DIV: 0x00020002 | ! (II) intel(0): VGACNTRL: 0xa2c4008e (disabled) | ! (II) intel(0): TV_CTL: 0x000c00c0 | (II) intel(0): TV_DAC: 0x70000000 | ! (II) intel(0): TV_CSC_Y: 0x0332012d | ! (II) intel(0): TV_CSC_Y2: 0x07d30104 | ! (II) intel(0): TV_CSC_U: 0x0733052d | ! (II) intel(0): TV_CSC_U2: 0x05c70200 | ! (II) intel(0): TV_CSC_V: 0x0340030c | ! (II) intel(0): TV_CSC_V2: 0x06d00200 | ! (II) intel(0): TV_CLR_KNOBS: 0x00404000 | ! (II) intel(0): TV_CLR_LEVEL: 0x010b00e1 | ! (II) intel(0): TV_H_CTL_1: 0x00400359 | ! (II) intel(0): TV_H_CTL_2: 0x80480022 | ! (II) intel(0): TV_H_CTL_3: 0x007c0344 | ! (II) intel(0): TV_V_CTL_1: 0x00f01415 | ! (II) intel(0): TV_V_CTL_2: 0x00060607 | ! (II) intel(0): TV_V_CTL_3: 0x80120001 | ! (II) intel(0): TV_V_CTL_4: 0x000900f0 | ! (II) intel(0): TV_V_CTL_5: 0x000a00f0 | ! (II) intel(0): TV_V_CTL_6: 0x000900f0 | ! (II) intel(0): TV_V_CTL_7: 0x000a00f0 | ! (II) intel(0): TV_SC_CTL_1: 0xc1710087 | ! (II) intel(0): TV_SC_CTL_2: 0x6b405140 | (II) intel(0): TV_SC_CTL_3: 0x00000000 | ! (II) intel(0): TV_WIN_POS: 0x00360024 | ! (II) intel(0): TV_WIN_SIZE: 0x02640198 | ! (II) intel(0): TV_FILTER_CTL_1: 0x8000085e | ! (II) intel(0): TV_FILTER_CTL_2: 0x00012d2d | ! (II) intel(0): TV_FILTER_CTL_3: 0x00009696 | (II) intel(0): TV_CC_CONTROL: 0x00000000 | (II) intel(0): TV_CC_DATA: 0x00000000 | ! (II) intel(0): TV_H_LUMA_0: 0xb1403000 | ! (II) intel(0): TV_H_LUMA_59: 0x0000b060 | ! (II) intel(0): TV_H_CHROMA_0: 0xb1403000 | ! (II) intel(0): TV_H_CHROMA_59: 0x0000b060 | (II) intel(0): FBC_CFB_BASE: 0x00000000 | (II) intel(0): FBC_LL_BASE: 0x00000000 | (II) intel(0): FBC_CONTROL: 0x00000000 | *************** | *** 335,343 **** | (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 | ! (II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 | ! (II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue. | ! (II) intel(0): pipe B dot 112500 n 2 m1 21 m2 9 p1 4 p2 7 | (II) intel(0): DumpRegsEnd | (II) intel(0): 2 display pipes available. | (II) Loading sub module "ddc" | --- 335,342 ---- | (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 | ! (II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10 | ! (II) intel(0): pipe B dot 112380 n 3 m1 20 m2 6 p1 3 p2 7 | (II) intel(0): DumpRegsEnd | (II) intel(0): 2 display pipes available. | (II) Loading sub module "ddc" | *************** | *** 368,373 **** | --- 367,377 ---- | (II) intel(0): SDVOB: device VID/DID: 04:AA.03, clock range 25.0MHz - 165.0MHz | (II) intel(0): SDVOB: 1 input channel | (II) intel(0): SDVOB: TMDS0 output reported | + (II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" initialized. | + (II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" registered at | address 0x72. | + (II) intel(0): No SDVO device found on SDVOC | + (II) intel(0): I2C device "SDVOCTRL_E for SDVOC:SDVO Controller C" removed. | + (II) intel(0): I2C bus "SDVOCTRL_E for SDVOC" removed. | (II) intel(0): Output TV has no monitor section | (II) intel(0): SDVOB: W: 20 (SDVO_CMD_GET_CLOCK_RATE_MULT) | (II) intel(0): SDVOB: R: 01 (Success) | *************** | *** 387,392 **** | --- 391,397 ---- | (II) intel(0): SDVOB: W: 19 | (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) | (II) intel(0): SDVOB: R: 00 00 00 00 1E 00 00 00 (Success) | (==) intel(0): Write-combining range (0xa0000,0x10000) was already clear | + (II) intel(0): Resizable framebuffer: not available (1 3) | (II) intel(0): EDID for output VGA | (II) intel(0): EDID for output LVDS | (II) intel(0): Manufacturer: SEC Model: 4650 Serial#: 0 | *************** | *** 401,406 **** | --- 406,412 ---- | (II) intel(0): Supported color encodings: RGB 4:4:4 YCrCb 4:4:4 | (II) intel(0): First detailed timing is preferred mode | (II) intel(0): Preferred mode is native pixel format and refresh rate | + (II) intel(0): Display is continuous-frequency | (II) intel(0): redX: 0.580 redY: 0.340 greenX: 0.310 greenY: 0.550 | (II) intel(0): blueX: 0.155 blueY: 0.155 whiteX: 0.313 whiteY: 0.329 | (II) intel(0): Manufacturer's mask: 0 | *************** | *** 408,414 **** | (II) intel(0): clock: 108.0 MHz Image Size: 304 x 228 mm | (II) intel(0): h_active: 1400 h_sync: 1448 h_sync_end 1560 h_blank_end 1688 | h_border: 0 | (II) intel(0): v_active: 1050 v_sync: 1051 v_sync_end 1055 v_blanking: 1066 | v_border: 0 | ! (WW) intel(0): Unknown vendor-specific block f | (II) intel(0): U805G | (II) intel(0): $B%`%=!<Yi(BnK | (II) intel(0): EDID (in hex): | --- 414,420 ---- | (II) intel(0): clock: 108.0 MHz Image Size: 304 x 228 mm | (II) intel(0): h_active: 1400 h_sync: 1448 h_sync_end 1560 h_blank_end 1688 | h_border: 0 | (II) intel(0): v_active: 1050 v_sync: 1051 v_sync_end 1055 v_blanking: 1066 | v_border: 0 | ! (II) intel(0): Ranges: V min: 0 V max: 200 Hz, H min: 0 H max: 200 kHz, | (II) intel(0): U805G | (II) intel(0): $B%`%=!<Yi(BnK | (II) intel(0): EDID (in hex): | *************** | *** 421,434 **** | (II) intel(0): 383035470031353050460a20000000fe | (II) intel(0): 00d1bfb09d896e4b00020a20202000de | (II) intel(0): EDID vendor "SEC", prod id 18000 | (II) intel(0): Printing probed modes for output LVDS | (II) intel(0): Modeline "1400x1050"x60.0 108.00 1400 1448 1560 1688 1050 1051 | 1055 1066 -hsync -vsync (64.0 kHz) | (II) intel(0): SDVOB: W: 0B (SDVO_CMD_GET_ATTACHED_DISPLAYS) | (II) intel(0): SDVOB: R: 00 00 (Success) | (II) intel(0): EDID for output TMDS-1 | (II) intel(0): Mode for pipe A: | (II) intel(0): Modeline "NTSC 480i"x0.0 107.52 1280 1368 1496 1712 1024 1027 | 1034 1104 (62.8 kHz) | ! (II) intel(0): chosen: dotclock 107520 vco 2150400 ((m 112, m1 19, m2 5), n 3, (p | 20, p1 2, p2 10)) | (II) intel(0): No TV connection detected | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | --- 427,482 ---- | (II) intel(0): 383035470031353050460a20000000fe | (II) intel(0): 00d1bfb09d896e4b00020a20202000de | (II) intel(0): EDID vendor "SEC", prod id 18000 | + (II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1600x1200" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1792x1344" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1856x1392" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "1920x1440" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions) | + (II) intel(0): Not using default mode "2048x1536" (exceeds panel dimensions) | (II) intel(0): Printing probed modes for output LVDS | (II) intel(0): Modeline "1400x1050"x60.0 108.00 1400 1448 1560 1688 1050 1051 | 1055 1066 -hsync -vsync (64.0 kHz) | + (II) intel(0): Modeline "1400x1050"x74.8 155.80 1400 1464 1784 1912 1050 1052 | 1064 1090 +hsync +vsync (81.5 kHz) | + (II) intel(0): Modeline "1400x1050"x60.0 122.00 1400 1488 1640 1880 1050 1052 | 1064 1082 +hsync +vsync (64.9 kHz) | + (II) intel(0): Modeline "1280x1024"x85.0 157.50 1280 1344 1504 1728 1024 1025 | 1028 1072 +hsync +vsync (91.1 kHz) | + (II) intel(0): Modeline "1280x1024"x75.0 135.00 1280 1296 1440 1688 1024 1025 | 1028 1066 +hsync +vsync (80.0 kHz) | + (II) intel(0): Modeline "1280x1024"x60.0 108.00 1280 1328 1440 1688 1024 1025 | 1028 1066 +hsync +vsync (64.0 kHz) | + (II) intel(0): Modeline "1280x960"x85.0 148.50 1280 1344 1504 1728 960 961 964 | 1011 +hsync +vsync (85.9 kHz) | + (II) intel(0): Modeline "1280x960"x60.0 108.00 1280 1376 1488 1800 960 961 964 | 1000 +hsync +vsync (60.0 kHz) | + (II) intel(0): Modeline "1152x864"x75.0 108.00 1152 1216 1344 1600 864 865 868 | 900 +hsync +vsync (67.5 kHz) | + (II) intel(0): Modeline "1024x768"x85.0 94.50 1024 1072 1168 1376 768 769 772 | 808 +hsync +vsync (68.7 kHz) | + (II) intel(0): Modeline "1024x768"x75.0 78.75 1024 1040 1136 1312 768 769 772 | 800 +hsync +vsync (60.0 kHz) | + (II) intel(0): Modeline "1024x768"x70.1 75.00 1024 1048 1184 1328 768 771 777 | 806 -hsync -vsync (56.5 kHz) | + (II) intel(0): Modeline "1024x768"x60.0 65.00 1024 1048 1184 1344 768 771 777 | 806 -hsync -vsync (48.4 kHz) | + (II) intel(0): Modeline "832x624"x74.6 57.28 832 864 928 1152 624 625 628 667 | -hsync -vsync (49.7 kHz) | + (II) intel(0): Modeline "800x600"x85.1 56.30 800 832 896 1048 600 601 604 631 | +hsync +vsync (53.7 kHz) | + (II) intel(0): Modeline "800x600"x72.2 50.00 800 856 976 1040 600 637 643 666 | +hsync +vsync (48.1 kHz) | + (II) intel(0): Modeline "800x600"x75.0 49.50 800 816 896 1056 600 601 604 625 | +hsync +vsync (46.9 kHz) | + (II) intel(0): Modeline "800x600"x60.3 40.00 800 840 968 1056 600 601 605 628 | +hsync +vsync (37.9 kHz) | + (II) intel(0): Modeline "800x600"x56.2 36.00 800 824 896 1024 600 601 603 625 | +hsync +vsync (35.2 kHz) | + (II) intel(0): Modeline "640x480"x85.0 36.00 640 696 752 832 480 481 484 509 | -hsync -vsync (43.3 kHz) | + (II) intel(0): Modeline "640x480"x72.8 31.50 640 664 704 832 480 489 492 520 | -hsync -vsync (37.9 kHz) | + (II) intel(0): Modeline "640x480"x75.0 31.50 640 656 720 840 480 481 484 500 | -hsync -vsync (37.5 kHz) | + (II) intel(0): Modeline "640x480"x59.9 25.18 640 656 752 800 480 490 492 525 | -hsync -vsync (31.5 kHz) | + (II) intel(0): Modeline "720x400"x85.0 35.50 720 756 828 936 400 401 404 446 | -hsync +vsync (37.9 kHz) | + (II) intel(0): Modeline "640x400"x85.1 31.50 640 672 736 832 400 401 404 445 | -hsync +vsync (37.9 kHz) | + (II) intel(0): Modeline "640x350"x85.1 31.50 640 672 736 832 350 382 385 445 | +hsync -vsync (37.9 kHz) | (II) intel(0): SDVOB: W: 0B (SDVO_CMD_GET_ATTACHED_DISPLAYS) | (II) intel(0): SDVOB: R: 00 00 (Success) | (II) intel(0): EDID for output TMDS-1 | (II) intel(0): Mode for pipe A: | (II) intel(0): Modeline "NTSC 480i"x0.0 107.52 1280 1368 1496 1712 1024 1027 | 1034 1104 (62.8 kHz) | ! (II) intel(0): Adjusted mode for pipe A: | ! (II) intel(0): Modeline "NTSC 480i"x0.0 108.00 1280 1368 1496 1712 1024 1027 | 1034 1104 (63.1 kHz) | ! (II) intel(0): chosen: dotclock 108000 vco 2160000 ((m 90, m1 14, m2 8), n 2, (p | 20, p1 2, p2 10)) | (II) intel(0): No TV connection detected | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | *************** | *** 458,468 **** | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | (==) intel(0): Write-combining range (0xa0000,0x10000) was already clear | - (II) intel(0): Monitoring connected displays enabled | (II) intel(0): detected 512 kB GTT. | (II) intel(0): detected 7676 kB stolen memory. | (==) intel(0): video overlay key set to 0x101fe | - (**) intel(0): Intel XvMC decoder enabled | (==) intel(0): Will not try to enable page flipping | (==) intel(0): Triple buffering disabled | (**) intel(0): Using gamma correction (0.8, 0.8, 0.7) | --- 506,514 ---- | *************** | *** 486,530 **** | (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 | (WW) intel(0): PP_STATUS before: on, ready, sequencing idle | (WW) intel(0): PP_STATUS after: on, ready, sequencing on | ! (WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000203 to 0x00000000 | ! (WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS | OREG_UPDATE_STATUS | ! (WW) intel(0): PIPEASTAT after: status: | ! (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000206 to 0x00000206 | ! (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS | SVBLANK_INT_STATUS VBLANK_INT_STATUS | ! (WW) intel(0): PIPEBSTAT after: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS | VBLANK_INT_STATUS | ! (WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000c0 to 0x000c00c0 | ! (WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d | ! (WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104 | ! (WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d | ! (WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200 | ! (WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c | ! (WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200 | ! (WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00404000 | ! (WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1 | ! (WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359 | ! (WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022 | ! (WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344 | ! (WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415 | ! (WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607 | ! (WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001 | ! (WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0 | ! (WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0 | ! (WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0 | ! (WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0 | ! (WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710088 | ! (WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x4e2d1dc8 | ! (WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024 | ! (WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198 | ! (WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to | 0x8000085e | ! (WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to | 0x00028283 | ! (WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to | 0x00014141 | ! (WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000 | ! (WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060 | ! (WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000 | ! (WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to | 0x0000b060 | (II) Loading sub module "dri" | (II) LoadModule: "dri" | (II) Reloading /usr/local/lib/xorg/modules/extensions//libdri.so | (==) Depth 24 pixmap format is 32 bpp | (II) do I need RAC? No, I don't. | (II) resource ranges after preInit: | --- 532,551 ---- | (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 | (WW) intel(0): PP_STATUS before: on, ready, sequencing idle | (WW) intel(0): PP_STATUS after: on, ready, sequencing on | ! (WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000000 to 0x80000207 | ! (WW) intel(0): PIPEASTAT before: status: | ! (WW) intel(0): PIPEASTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS | SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS | ! (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x00000206 to 0x80000206 | ! (WW) intel(0): PIPEBSTAT before: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS | VBLANK_INT_STATUS | ! (WW) intel(0): PIPEBSTAT after: status: FIFO_UNDERRUN VSYNC_INT_STATUS | SVBLANK_INT_STATUS VBLANK_INT_STATUS | ! (WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00012d2d to | 0x00028283 | ! (WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00009696 to | 0x00014141 | (II) Loading sub module "dri" | (II) LoadModule: "dri" | (II) Reloading /usr/local/lib/xorg/modules/extensions//libdri.so | + (II) Loading sub module "dri2" | + (II) LoadModule: "dri2" | + (II) Reloading /usr/local/lib/xorg/modules/extensions//libdri2.so | (==) Depth 24 pixmap format is 32 bpp | (II) do I need RAC? No, I don't. | (II) resource ranges after preInit: | *************** | *** 540,565 **** | [9] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) | (II) intel(0): Kernel reported 491520 total, 0 used | (II) intel(0): I830CheckAvailableMemory: 1966080 kB available | drmOpenDevice: node name is /dev/dri/card0 | ! drmOpenDevice: open result is -1, (No such file or directory) | ! drmOpenDevice: open result is -1, (No such file or directory) | ! drmOpenDevice: Open failed | drmOpenDevice: node name is /dev/dri/card0 | ! drmOpenDevice: open result is -1, (No such file or directory) | ! drmOpenDevice: open result is -1, (No such file or directory) | ! drmOpenDevice: Open failed | drmOpenByBusid: Searching for BusID pci:0000:00:02.0 | drmOpenDevice: node name is /dev/dri/card0 | drmOpenDevice: open result is 11, (OK) | drmOpenByBusid: drmOpenMinor returns 11 | drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 | - (II) [drm] loaded kernel module for "i915" driver. | (II) [drm] DRM interface version 1.2 | (II) [drm] DRM open master succeeded. | (II) intel(0): [drm] Using the DRM lock SAREA also for drawables. | (II) intel(0): [drm] framebuffer mapped by ddx driver | (II) intel(0): [drm] added 1 reserved context for kernel | ! (II) intel(0): X context handle = 0x1 | (II) intel(0): [drm] installed DRM signal handler | (**) intel(0): Framebuffer compression disabled | (**) intel(0): Tiling enabled | --- 561,582 ---- | [9] 0 0 0x000003c0 - 0x000003df (0x20) IS[B](OprU) | (II) intel(0): Kernel reported 491520 total, 0 used | (II) intel(0): I830CheckAvailableMemory: 1966080 kB available | + (WW) intel(0): DRI2 requires UXA | drmOpenDevice: node name is /dev/dri/card0 | ! drmOpenDevice: open result is 11, (OK) | drmOpenDevice: node name is /dev/dri/card0 | ! drmOpenDevice: open result is 11, (OK) | drmOpenByBusid: Searching for BusID pci:0000:00:02.0 | drmOpenDevice: node name is /dev/dri/card0 | drmOpenDevice: open result is 11, (OK) | drmOpenByBusid: drmOpenMinor returns 11 | drmOpenByBusid: drmGetBusid reports pci:0000:00:02.0 | (II) [drm] DRM interface version 1.2 | (II) [drm] DRM open master succeeded. | (II) intel(0): [drm] Using the DRM lock SAREA also for drawables. | (II) intel(0): [drm] framebuffer mapped by ddx driver | (II) intel(0): [drm] added 1 reserved context for kernel | ! (II) intel(0): X context handle = 0x3 | (II) intel(0): [drm] installed DRM signal handler | (**) intel(0): Framebuffer compression disabled | (**) intel(0): Tiling enabled | *************** | *** 568,577 **** | (II) intel(0): Tiled allocation successful. | (II) intel(0): [drm] Registers = 0xf6e00000 | (II) intel(0): [drm] ring buffer = 0xe0000000 | ! (II) intel(0): [drm] mapped front buffer at 0xe0200000, handle = 0xe0200000 | ! (II) intel(0): [drm] mapped back buffer at 0xe2014000, handle = 0xe2014000 | ! (II) intel(0): [drm] mapped depth buffer at 0xe27a4000, handle = 0xe27a4000 | ! (II) intel(0): [drm] mapped classic textures at 0xe2f34000, handle = 0xe2f34000 | (II) intel(0): [drm] Initialized kernel agp heap manager, 33554432 | (II) intel(0): [dri] visual configs initialized | (II) intel(0): Page Flipping disabled | --- 585,594 ---- | (II) intel(0): Tiled allocation successful. | (II) intel(0): [drm] Registers = 0xf6e00000 | (II) intel(0): [drm] ring buffer = 0xe0000000 | ! (II) intel(0): [drm] mapped front buffer at 0xe012b000, handle = 0xe012b000 | ! (II) intel(0): [drm] mapped back buffer at 0xe1f40000, handle = 0xe1f40000 | ! (II) intel(0): [drm] mapped depth buffer at 0xe26d0000, handle = 0xe26d0000 | ! (II) intel(0): [drm] mapped classic textures at 0xe2e60000, handle = 0xe2e60000 | (II) intel(0): [drm] Initialized kernel agp heap manager, 33554432 | (II) intel(0): [dri] visual configs initialized | (II) intel(0): Page Flipping disabled | *************** | *** 603,628 **** | (II) intel(0): SDVOB: R: 00 00 00 00 00 00 00 00 (Success) | (II) intel(0): SDVOB: W: 19 | (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) | (II) intel(0): SDVOB: R: 00 00 00 00 1E 00 00 00 (Success) | ! (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0077f000 (pgoffset 1919) | ! (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x00985000 (pgoffset 2437) | ! (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x02014000 (pgoffset 8212) | ! (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x027a4000 (pgoffset 10148) | ! (II) intel(0): xf86BindGARTMemory: bind key 5 at 0x02f34000 (pgoffset 12084) | (II) intel(0): Fixed memory allocation layout: | (II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB) | (II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB) | ! (II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB) | ! (II) intel(0): 0x00032000-0x00131fff: fake bufmgr (1024 kB) | ! (II) intel(0): 0x00132000-0x00147fff: exa G965 state buffer (88 kB) | ! (II) intel(0): 0x00148000-0x00148fff: overlay registers (4 kB) | ! (II) intel(0): 0x00149000-0x00149fff: power context (4 kB) | ! (II) intel(0): 0x00200000-0x00984fff: front buffer (7700 kB) X tiled | (II) intel(0): 0x0077f000: end of stolen memory | ! (II) intel(0): 0x00985000-0x02013fff: exa offscreen (23100 kB) | ! (II) intel(0): 0x02014000-0x027a3fff: back buffer (7744 kB) X tiled | ! (II) intel(0): 0x027a4000-0x02f33fff: depth buffer (7744 kB) Y tiled | ! (II) intel(0): 0x02f34000-0x04f33fff: classic textures (32768 kB) | (II) intel(0): 0x10000000: end of aperture | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | (II) intel(0): using SSC reference clock of 96 MHz | --- 620,646 ---- | (II) intel(0): SDVOB: R: 00 00 00 00 00 00 00 00 (Success) | (II) intel(0): SDVOB: W: 19 | (SDVO_CMD_GET_OUTPUT_TIMINGS_PART2) | (II) intel(0): SDVOB: R: 00 00 00 00 1E 00 00 00 (Success) | ! (II) intel(0): xf86BindGARTMemory: bind key 15 at 0x0077f000 (pgoffset 1919) | ! (II) intel(0): xf86BindGARTMemory: bind key 16 at 0x008b0000 (pgoffset 2224) | ! (II) intel(0): xf86BindGARTMemory: bind key 17 at 0x01f3f000 (pgoffset 7999) | ! (II) intel(0): xf86BindGARTMemory: bind key 18 at 0x01f40000 (pgoffset 8000) | ! (II) intel(0): xf86BindGARTMemory: bind key 19 at 0x026d0000 (pgoffset 9936) | ! (II) intel(0): xf86BindGARTMemory: bind key 20 at 0x02e60000 (pgoffset 11872) | (II) intel(0): Fixed memory allocation layout: | (II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB) | (II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB) | ! (II) intel(0): 0x0002a000-0x00129fff: fake bufmgr (1024 kB) | ! (II) intel(0): 0x0012a000-0x0012afff: overlay registers (4 kB) | ! (II) intel(0): 0x0012b000-0x008affff: front buffer (7700 kB) | (II) intel(0): 0x0077f000: end of stolen memory | ! (II) intel(0): 0x008b0000-0x01f3efff: exa offscreen (23100 kB) | ! (II) intel(0): 0x01f3f000-0x01f3ffff: power context (4 kB) | ! (II) intel(0): 0x01f40000-0x026cffff: back buffer (7744 kB) | ! (II) intel(0): 0x026d0000-0x02e5ffff: depth buffer (7744 kB) | ! (II) intel(0): 0x02e60000-0x04e5ffff: classic textures (32768 kB) | (II) intel(0): 0x10000000: end of aperture | + (WW) intel(0): PRB0_CTL (0x0001f001) indicates ring buffer enabled | + (WW) intel(0): Existing errors found in hardware state. | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | (II) intel(0): using SSC reference clock of 96 MHz | *************** | *** 683,698 **** | (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | ! (II) intel(0): DSPACNTR: 0x58000400 (disabled, pipe A) | (II) intel(0): DSPASTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | (II) intel(0): DSPABASE: 0x00000000 | ! (II) intel(0): DSPASURF: 0x00200000 | (II) intel(0): DSPATILEOFF: 0x00000000 | (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | ! (II) intel(0): PIPEASTAT: 0x00040004 (status: SVBLANK_INT_ENABLE | SVBLANK_INT_STATUS) | (II) intel(0): FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8) | (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | (II) intel(0): DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, | DAC/serial mode, p1 = 8, p2 = 10) | --- 701,716 ---- | (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | ! (II) intel(0): DSPACNTR: 0x58000000 (disabled, pipe A) | (II) intel(0): DSPASTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | (II) intel(0): DSPABASE: 0x00000000 | ! (II) intel(0): DSPASURF: 0x0012b000 | (II) intel(0): DSPATILEOFF: 0x00000000 | (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | ! (II) intel(0): PIPEASTAT: 0x80000207 (status: FIFO_UNDERRUN | VSYNC_INT_STATUS SVBLANK_INT_STATUS VBLANK_INT_STATUS OREG_UPDATE_STATUS) | (II) intel(0): FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8) | (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | (II) intel(0): DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, | DAC/serial mode, p1 = 8, p2 = 10) | *************** | *** 705,716 **** | (II) intel(0): VSYNC_A: 0x01ea01e8 (489 start, 491 end) | (II) intel(0): BCLRPAT_A: 0x00000000 | (II) intel(0): VSYNCSHIFT_A: 0x00000000 | ! (II) intel(0): DSPBCNTR: 0xd9000400 (enabled, pipe B) | (II) intel(0): DSPBSTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | (II) intel(0): DSPBBASE: 0x00000000 | ! (II) intel(0): DSPBSURF: 0x00200000 | (II) intel(0): DSPBTILEOFF: 0x00000000 | (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | (II) intel(0): PIPEBSRC: 0x05770419 (1400, 1050) | --- 723,734 ---- | (II) intel(0): VSYNC_A: 0x01ea01e8 (489 start, 491 end) | (II) intel(0): BCLRPAT_A: 0x00000000 | (II) intel(0): VSYNCSHIFT_A: 0x00000000 | ! (II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) | (II) intel(0): DSPBSTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | (II) intel(0): DSPBBASE: 0x00000000 | ! (II) intel(0): DSPBSURF: 0x0012b000 | (II) intel(0): DSPBTILEOFF: 0x00000000 | (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | (II) intel(0): PIPEBSRC: 0x05770419 (1400, 1050) | *************** | *** 730,736 **** | (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | (II) intel(0): VCLK_POST_DIV: 0x00020002 | ! (II) intel(0): VGACNTRL: 0x80000000 (disabled) | (II) intel(0): TV_CTL: 0x000c00c0 | (II) intel(0): TV_DAC: 0x70000000 | (II) intel(0): TV_CSC_Y: 0x0332012d | --- 748,754 ---- | (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | (II) intel(0): VCLK_POST_DIV: 0x00020002 | ! (II) intel(0): VGACNTRL: 0xa2c4008e (disabled) | (II) intel(0): TV_CTL: 0x000c00c0 | (II) intel(0): TV_DAC: 0x70000000 | (II) intel(0): TV_CSC_Y: 0x0332012d | *************** | *** 751,758 **** | (II) intel(0): TV_V_CTL_5: 0x000a00f0 | (II) intel(0): TV_V_CTL_6: 0x000900f0 | (II) intel(0): TV_V_CTL_7: 0x000a00f0 | ! (II) intel(0): TV_SC_CTL_1: 0xc1710088 | ! (II) intel(0): TV_SC_CTL_2: 0x4e2d1dc8 | (II) intel(0): TV_SC_CTL_3: 0x00000000 | (II) intel(0): TV_WIN_POS: 0x00360024 | (II) intel(0): TV_WIN_SIZE: 0x02640198 | --- 769,776 ---- | (II) intel(0): TV_V_CTL_5: 0x000a00f0 | (II) intel(0): TV_V_CTL_6: 0x000900f0 | (II) intel(0): TV_V_CTL_7: 0x000a00f0 | ! (II) intel(0): TV_SC_CTL_1: 0xc1710087 | ! (II) intel(0): TV_SC_CTL_2: 0x6b405140 | (II) intel(0): TV_SC_CTL_3: 0x00000000 | (II) intel(0): TV_WIN_POS: 0x00360024 | (II) intel(0): TV_WIN_SIZE: 0x02640198 | *************** | *** 814,823 **** | (II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message. | (**) Option "dpms" | (**) intel(0): DPMS enabled | (II) intel(0): Set up textured video | (II) intel(0): Set up overlay video | ! Failed to probe XvMC driver. | ! (II) intel(0): direct rendering: Enabled | (--) RandR disabled | (II) Initializing built-in extension Generic Event Extension | (II) Initializing built-in extension SHAPE | --- 832,843 ---- | (II) intel(0): RandR 1.2 enabled, ignore the following RandR disabled message. | (**) Option "dpms" | (**) intel(0): DPMS enabled | + (**) intel(0): Intel XvMC decoder enabled | (II) intel(0): Set up textured video | (II) intel(0): Set up overlay video | ! (II) intel(0): xf86BindGARTMemory: bind key 21 at 0x04e60000 (pgoffset 20064) | ! (II) intel(0): [XvMC] i965_xvmc driver initialized. | ! (II) intel(0): direct rendering: XF86DRI Enabled | (--) RandR disabled | (II) Initializing built-in extension Generic Event Extension | (II) Initializing built-in extension SHAPE | *************** | *** 884,890 **** | (**) Option "CustomKeycodes" "off" | (**) Keyboard1: CustomKeycodes disabled | (II) XINPUT: Adding extended input device "Keyboard1" (type: KEYBOARD) | ! (II) intel(0): xf86BindGARTMemory: bind key 6 at 0x04f34000 (pgoffset 20276) | (II) AIGLX: Suspending AIGLX clients for VT switch | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | --- 904,911 ---- | (**) Option "CustomKeycodes" "off" | (**) Keyboard1: CustomKeycodes disabled | (II) XINPUT: Adding extended input device "Keyboard1" (type: KEYBOARD) | ! Failed to switch consoles (Invalid argument) | ! Failed to switch consoles (Invalid argument) | (II) AIGLX: Suspending AIGLX clients for VT switch | (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | (II) intel(0): SDVOB: R: (Success) | *************** | *** 908,1154 **** | (WW) intel(0): Register 0x61200 (PP_STATUS) changed from 0xc0000008 to 0xd0000009 | (WW) intel(0): PP_STATUS before: on, ready, sequencing idle | (WW) intel(0): PP_STATUS after: on, ready, sequencing on | - (WW) intel(0): Register 0x70024 (PIPEASTAT) changed from 0x00000203 to 0x00000000 | - (WW) intel(0): PIPEASTAT before: status: VSYNC_INT_STATUS VBLANK_INT_STATUS | OREG_UPDATE_STATUS | - (WW) intel(0): PIPEASTAT after: status: | - (WW) intel(0): Register 0x71024 (PIPEBSTAT) changed from 0x80000206 to 0x00000206 | - (WW) intel(0): PIPEBSTAT before: status: FIFO_UNDERRUN VSYNC_INT_STATUS | SVBLANK_INT_STATUS VBLANK_INT_STATUS | - (WW) intel(0): PIPEBSTAT after: status: VSYNC_INT_STATUS SVBLANK_INT_STATUS | VBLANK_INT_STATUS | - (WW) intel(0): Register 0x68000 (TV_CTL) changed from 0x100000c0 to 0x000c00c0 | - (WW) intel(0): Register 0x68010 (TV_CSC_Y) changed from 0x00000000 to 0x0332012d | - (WW) intel(0): Register 0x68014 (TV_CSC_Y2) changed from 0x00000000 to 0x07d30104 | - (WW) intel(0): Register 0x68018 (TV_CSC_U) changed from 0x00000000 to 0x0733052d | - (WW) intel(0): Register 0x6801c (TV_CSC_U2) changed from 0x00000000 to 0x05c70200 | - (WW) intel(0): Register 0x68020 (TV_CSC_V) changed from 0x00000000 to 0x0340030c | - (WW) intel(0): Register 0x68024 (TV_CSC_V2) changed from 0x00000000 to 0x06d00200 | - (WW) intel(0): Register 0x68028 (TV_CLR_KNOBS) changed from 0x00000000 to 0x00404000 | - (WW) intel(0): Register 0x6802c (TV_CLR_LEVEL) changed from 0x00000000 to 0x010b00e1 | - (WW) intel(0): Register 0x68030 (TV_H_CTL_1) changed from 0x00000000 to 0x00400359 | - (WW) intel(0): Register 0x68034 (TV_H_CTL_2) changed from 0x00000000 to 0x80480022 | - (WW) intel(0): Register 0x68038 (TV_H_CTL_3) changed from 0x00000000 to 0x007c0344 | - (WW) intel(0): Register 0x6803c (TV_V_CTL_1) changed from 0x00000000 to 0x00f01415 | - (WW) intel(0): Register 0x68040 (TV_V_CTL_2) changed from 0x00000000 to 0x00060607 | - (WW) intel(0): Register 0x68044 (TV_V_CTL_3) changed from 0x00000000 to 0x80120001 | - (WW) intel(0): Register 0x68048 (TV_V_CTL_4) changed from 0x00000000 to 0x000900f0 | - (WW) intel(0): Register 0x6804c (TV_V_CTL_5) changed from 0x00000000 to 0x000a00f0 | - (WW) intel(0): Register 0x68050 (TV_V_CTL_6) changed from 0x00000000 to 0x000900f0 | - (WW) intel(0): Register 0x68054 (TV_V_CTL_7) changed from 0x00000000 to 0x000a00f0 | - (WW) intel(0): Register 0x68060 (TV_SC_CTL_1) changed from 0x00000000 to 0xc1710088 | - (WW) intel(0): Register 0x68064 (TV_SC_CTL_2) changed from 0x00000000 to 0x4e2d1dc8 | - (WW) intel(0): Register 0x68070 (TV_WIN_POS) changed from 0x00000000 to 0x00360024 | - (WW) intel(0): Register 0x68074 (TV_WIN_SIZE) changed from 0x00000000 to 0x02640198 | - (WW) intel(0): Register 0x68080 (TV_FILTER_CTL_1) changed from 0x00000000 to | 0x8000085e | - (WW) intel(0): Register 0x68084 (TV_FILTER_CTL_2) changed from 0x00000000 to | 0x00012d2d | - (WW) intel(0): Register 0x68088 (TV_FILTER_CTL_3) changed from 0x00000000 to | 0x00009696 | - (WW) intel(0): Register 0x68100 (TV_H_LUMA_0) changed from 0x00000000 to 0xb1403000 | - (WW) intel(0): Register 0x681ec (TV_H_LUMA_59) changed from 0x00000000 to 0x0000b060 | - (WW) intel(0): Register 0x68200 (TV_H_CHROMA_0) changed from 0x00000000 to 0xb1403000 | - (WW) intel(0): Register 0x682ec (TV_H_CHROMA_59) changed from 0x00000000 to | 0x0000b060 | - (II) intel(0): DumpRegsBegin | - (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh | disabled, ch0 enh disabled, flex disabled, ep not present) | - (II) intel(0): C0DRB0: 0x000f0002 (0x0002) | - (II) intel(0): C0DRB1: 0x0000000f (0x000f) | - (II) intel(0): C0DRB2: 0x00000000 (0x0000) | - (II) intel(0): C0DRB3: 0x0e000000 (0x0000) | - (II) intel(0): C1DRB0: 0x17cbe000 (0xe000) | - (II) intel(0): C1DRB1: 0x000017cb (0x17cb) | - (II) intel(0): C1DRB2: 0x00000000 (0x0000) | - (II) intel(0): C1DRB3: 0x00000000 (0x0000) | - (II) intel(0): C0DRA01: 0x00030e00 (0x0e00) | - (II) intel(0): C0DRA23: 0x000c0003 (0x0003) | - (II) intel(0): C1DRA01: 0x00000000 (0x0000) | - (II) intel(0): C1DRA23: 0x00000000 (0x0000) | - (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) | - (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 (n = 3, m1 = 20, m2 = 6) | - (II) intel(0): VCLK_POST_DIV: 0x00020002 (vga0 p1 = 4, p2 = 2, vga1 p1 = 2, | p2 = 2) | - (II) intel(0): DPLL_TEST: 0x00010001 () | - (II) intel(0): CACHE_MODE_0: 0x00006800 | - (II) intel(0): D_STATE: 0x00000000 | - (II) intel(0): DSPCLK_GATE_D: 0x00001000 (clock gates disabled: DPLUNIT) | - (II) intel(0): RENCLK_GATE_D1: 0x00000000 | - (II) intel(0): RENCLK_GATE_D2: 0x00000000 | - (II) intel(0): SDVOB: 0x0008001c (disabled, pipe A, stall disabled, | detected) | - (II) intel(0): SDVOC: 0x00080018 (disabled, pipe A, stall disabled, | not detected) | - (II) intel(0): SDVOUDI: 0x00000000 | - (II) intel(0): DSPARB: 0x00001d9c | - (II) intel(0): DSPFW1: 0x3f8f0f0f | - (II) intel(0): DSPFW2: 0x00000f0f | - (II) intel(0): DSPFW3: 0x00000000 | - (II) intel(0): ADPA: 0x40008c18 (disabled, pipe B, +hsync, +vsync) | - (II) intel(0): LVDS: 0xc230833c (enabled, pipe B, 18 bit, 2 channels) | - (II) intel(0): DVOA: 0x00000000 (disabled, pipe A, no stall, | -hsync, -vsync) | - (II) intel(0): DVOB: 0x0008001c (disabled, pipe A, no stall, | +hsync, +vsync) | - (II) intel(0): DVOC: 0x00080018 (disabled, pipe A, no stall, | +hsync, +vsync) | - (II) intel(0): DVOA_SRCDIM: 0x00000000 | - (II) intel(0): DVOB_SRCDIM: 0x00000000 | - (II) intel(0): DVOC_SRCDIM: 0x00000000 | - (II) intel(0): PP_CONTROL: 0x00000003 (power target: on) | - (II) intel(0): PP_STATUS: 0xd0000009 (on, ready, sequencing on) | - (II) intel(0): PP_ON_DELAYS: 0x012c0fff | - (II) intel(0): PP_OFF_DELAYS: 0x00fa07d0 | - (II) intel(0): PP_DIVISOR: 0x003e7f07 | - (II) intel(0): PFIT_CONTROL: 0xa0000000 | - (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | - (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | - (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | - (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) | - (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) | - (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | - (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | - (II) intel(0): DSPABASE: 0x00000000 | - (II) intel(0): DSPASURF: 0x00000000 | - (II) intel(0): DSPATILEOFF: 0x00000000 | - (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | - (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | - (II) intel(0): PIPEASTAT: 0x00000000 (status:) | - (II) intel(0): FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) | - (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | - (II) intel(0): DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default | clock, DAC/serial mode, p1 = 8, p2 = 10) | - (II) intel(0): DPLL_A_MD: 0x00000303 | - (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) | - (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) | - (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) | - (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) | - (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) | - (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) | - (II) intel(0): BCLRPAT_A: 0x00000000 | - (II) intel(0): VSYNCSHIFT_A: 0x00000000 | - (II) intel(0): DSPBCNTR: 0x49000000 (disabled, pipe B) | - (II) intel(0): DSPBSTRIDE: 0x00000280 (640 bytes) | - (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | - (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | - (II) intel(0): DSPBBASE: 0x00000000 | - (II) intel(0): DSPBSURF: 0x00000000 | - (II) intel(0): DSPBTILEOFF: 0x00000000 | - (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | - (II) intel(0): PIPEBSRC: 0x027f018f (640, 400) | - (II) intel(0): PIPEBSTAT: 0x00000206 (status: VSYNC_INT_STATUS | SVBLANK_INT_STATUS VBLANK_INT_STATUS) | - (II) intel(0): FPB0: 0x00021509 (n = 2, m1 = 21, m2 = 9) | - (II) intel(0): FPB1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | - (II) intel(0): DPLL_B: 0x99086a00 (enabled, non-dvo, spread spectrum | clock, LVDS mode, p1 = 4, p2 = 7) | - (II) intel(0): DPLL_B_MD: 0x00000003 | - (II) intel(0): HTOTAL_B: 0x06970577 (1400 active, 1688 total) | - (II) intel(0): HBLANK_B: 0x06970577 (1400 start, 1688 end) | - (II) intel(0): HSYNC_B: 0x061705a7 (1448 start, 1560 end) | - (II) intel(0): VTOTAL_B: 0x04290419 (1050 active, 1066 total) | - (II) intel(0): VBLANK_B: 0x04290419 (1050 start, 1066 end) | - (II) intel(0): VSYNC_B: 0x041e041a (1051 start, 1055 end) | - (II) intel(0): BCLRPAT_B: 0x00000000 | - (II) intel(0): VSYNCSHIFT_B: 0x00000000 | - (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | - (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | - (II) intel(0): VCLK_POST_DIV: 0x00020002 | - (II) intel(0): VGACNTRL: 0x22c4008e (enabled) | - (II) intel(0): TV_CTL: 0x000c00c0 | - (II) intel(0): TV_DAC: 0x70000000 | - (II) intel(0): TV_CSC_Y: 0x0332012d | - (II) intel(0): TV_CSC_Y2: 0x07d30104 | - (II) intel(0): TV_CSC_U: 0x0733052d | - (II) intel(0): TV_CSC_U2: 0x05c70200 | - (II) intel(0): TV_CSC_V: 0x0340030c | - (II) intel(0): TV_CSC_V2: 0x06d00200 | - (II) intel(0): TV_CLR_KNOBS: 0x00404000 | - (II) intel(0): TV_CLR_LEVEL: 0x010b00e1 | - (II) intel(0): TV_H_CTL_1: 0x00400359 | - (II) intel(0): TV_H_CTL_2: 0x80480022 | - (II) intel(0): TV_H_CTL_3: 0x007c0344 | - (II) intel(0): TV_V_CTL_1: 0x00f01415 | - (II) intel(0): TV_V_CTL_2: 0x00060607 | - (II) intel(0): TV_V_CTL_3: 0x80120001 | - (II) intel(0): TV_V_CTL_4: 0x000900f0 | - (II) intel(0): TV_V_CTL_5: 0x000a00f0 | - (II) intel(0): TV_V_CTL_6: 0x000900f0 | - (II) intel(0): TV_V_CTL_7: 0x000a00f0 | - (II) intel(0): TV_SC_CTL_1: 0xc1710088 | - (II) intel(0): TV_SC_CTL_2: 0x4e2d1dc8 | - (II) intel(0): TV_SC_CTL_3: 0x00000000 | - (II) intel(0): TV_WIN_POS: 0x00360024 | - (II) intel(0): TV_WIN_SIZE: 0x02640198 | - (II) intel(0): TV_FILTER_CTL_1: 0x8000085e | - (II) intel(0): TV_FILTER_CTL_2: 0x00012d2d | - (II) intel(0): TV_FILTER_CTL_3: 0x00009696 | - (II) intel(0): TV_CC_CONTROL: 0x00000000 | - (II) intel(0): TV_CC_DATA: 0x00000000 | - (II) intel(0): TV_H_LUMA_0: 0xb1403000 | - (II) intel(0): TV_H_LUMA_59: 0x0000b060 | - (II) intel(0): TV_H_CHROMA_0: 0xb1403000 | - (II) intel(0): TV_H_CHROMA_59: 0x0000b060 | - (II) intel(0): FBC_CFB_BASE: 0x00000000 | - (II) intel(0): FBC_LL_BASE: 0x00000000 | - (II) intel(0): FBC_CONTROL: 0x00000000 | - (II) intel(0): FBC_COMMAND: 0x00000000 | - (II) intel(0): FBC_STATUS: 0x20000000 | - (II) intel(0): FBC_CONTROL2: 0x00000000 | - (II) intel(0): FBC_FENCE_OFF: 0x00000000 | - (II) intel(0): FBC_MOD_NUM: 0x00000000 | - (II) intel(0): MI_MODE: 0x00000200 | - (II) intel(0): MI_ARB_STATE: 0x00000044 | - (II) intel(0): MI_RDRET_STATE: 0x00000000 | - (II) intel(0): ECOSKPD: 0x00000307 | - (II) intel(0): DP_B: 0x00000000 | - (II) intel(0): DPB_AUX_CH_CTL: 0x00000000 | - (II) intel(0): DPB_AUX_CH_DATA1: 0x00000000 | - (II) intel(0): DPB_AUX_CH_DATA2: 0x00000000 | - (II) intel(0): DPB_AUX_CH_DATA3: 0x00000000 | - (II) intel(0): DPB_AUX_CH_DATA4: 0x00000000 | - (II) intel(0): DPB_AUX_CH_DATA5: 0x00000000 | - (II) intel(0): DP_C: 0x00000000 | - (II) intel(0): DPC_AUX_CH_CTL: 0x00000000 | - (II) intel(0): DPC_AUX_CH_DATA1: 0x00000000 | - (II) intel(0): DPC_AUX_CH_DATA2: 0x00000000 | - (II) intel(0): DPC_AUX_CH_DATA3: 0x00000000 | - (II) intel(0): DPC_AUX_CH_DATA4: 0x00000000 | - (II) intel(0): DPC_AUX_CH_DATA5: 0x00000000 | - (II) intel(0): DP_D: 0x00000000 | - (II) intel(0): DPD_AUX_CH_CTL: 0x00000000 | - (II) intel(0): DPD_AUX_CH_DATA1: 0x00000000 | - (II) intel(0): DPD_AUX_CH_DATA2: 0x00000000 | - (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 | - (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 | - (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 | - (II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 | - (II) intel(0): SDVO phase shift 5 out of range -- probobly not an issue. | - (II) intel(0): pipe B dot 112500 n 2 m1 21 m2 9 p1 4 p2 7 | - (II) intel(0): DumpRegsEnd | - (II) intel(0): xf86UnbindGARTMemory: unbind key 1 | - (II) intel(0): xf86UnbindGARTMemory: unbind key 2 | - (II) intel(0): xf86UnbindGARTMemory: unbind key 3 | - (II) intel(0): xf86UnbindGARTMemory: unbind key 4 | - (II) intel(0): xf86UnbindGARTMemory: unbind key 5 | - (II) intel(0): xf86UnbindGARTMemory: unbind key 6 | - (II) AIGLX: Resuming AIGLX clients after VT switch | - (II) intel(0): xf86BindGARTMemory: bind key 1 at 0x0077f000 (pgoffset 1919) | - (II) intel(0): xf86BindGARTMemory: bind key 2 at 0x00985000 (pgoffset 2437) | - (II) intel(0): xf86BindGARTMemory: bind key 3 at 0x02014000 (pgoffset 8212) | - (II) intel(0): xf86BindGARTMemory: bind key 4 at 0x027a4000 (pgoffset 10148) | - (II) intel(0): xf86BindGARTMemory: bind key 5 at 0x02f34000 (pgoffset 12084) | - (II) intel(0): xf86BindGARTMemory: bind key 6 at 0x04f34000 (pgoffset 20276) | - (II) intel(0): Fixed memory allocation layout: | - (II) intel(0): 0x00000000-0x0001ffff: ring buffer (128 kB) | - (II) intel(0): 0x00020000-0x00029fff: HW cursors (40 kB) | - (II) intel(0): 0x0002a000-0x00031fff: logical 3D context (32 kB) | - (II) intel(0): 0x00032000-0x00131fff: fake bufmgr (1024 kB) | - (II) intel(0): 0x00132000-0x00147fff: exa G965 state buffer (88 kB) | - (II) intel(0): 0x00148000-0x00148fff: overlay registers (4 kB) | - (II) intel(0): 0x00149000-0x00149fff: power context (4 kB) | - (II) intel(0): 0x00200000-0x00984fff: front buffer (7700 kB) X tiled | - (II) intel(0): 0x0077f000: end of stolen memory | - (II) intel(0): 0x00985000-0x02013fff: exa offscreen (23100 kB) | - (II) intel(0): 0x02014000-0x027a3fff: back buffer (7744 kB) X tiled | - (II) intel(0): 0x027a4000-0x02f33fff: depth buffer (7744 kB) Y tiled | - (II) intel(0): 0x02f34000-0x04f33fff: classic textures (32768 kB) | - (II) intel(0): 0x04f34000-0x05039fff: xv buffer (1048 kB) | - (II) intel(0): 0x10000000: end of aperture | - (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | - (II) intel(0): SDVOB: R: (Success) | - (II) intel(0): using SSC reference clock of 96 MHz | - (II) intel(0): Mode for pipe B: | - (II) intel(0): Modeline "1400x1050"x60.0 108.00 1400 1448 1560 1688 1050 1051 | 1055 1066 -hsync -vsync (64.0 kHz) | - (II) intel(0): chosen: dotclock 107885 vco 2265600 ((m 118, m1 20, m2 6), n 3, (p | 21, p1 3, p2 7)) | - (II) intel(0): Selecting standard 18 bit TMDS pixel format. | - (II) intel(0): SDVOB: W: 05 00 00 (SDVO_CMD_SET_ACTIVE_OUTPUTS) | - (II) intel(0): SDVOB: R: (Success) | - (II) intel(0): Hardware state at EnterVT: | (II) intel(0): DumpRegsBegin | (II) intel(0): CHDECMISC: 0x00000000 (none, ch2 enh disabled, ch1 enh | disabled, ch0 enh disabled, flex disabled, ep not present) | (II) intel(0): C0DRB0: 0x000f0002 (0x0002) | --- 929,934 ---- | *************** | *** 1196,1229 **** | (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | ! (II) intel(0): DSPACNTR: 0x00000000 (disabled, pipe A) | ! (II) intel(0): DSPASTRIDE: 0x00000000 (0 bytes) | (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | (II) intel(0): DSPABASE: 0x00000000 | ! (II) intel(0): DSPASURF: 0x00000000 | (II) intel(0): DSPATILEOFF: 0x00000000 | (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | (II) intel(0): PIPEASTAT: 0x00000000 (status:) | ! (II) intel(0): FPA0: 0x00031108 (n = 3, m1 = 17, m2 = 8) | (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | ! (II) intel(0): DPLL_A: 0x04800c00 (disabled, non-dvo, VGA, default | clock, DAC/serial mode, p1 = 8, p2 = 10) | ! (II) intel(0): DPLL_A_MD: 0x00000303 | ! (II) intel(0): HTOTAL_A: 0x031f027f (640 active, 800 total) | ! (II) intel(0): HBLANK_A: 0x03170287 (648 start, 792 end) | ! (II) intel(0): HSYNC_A: 0x02ef028f (656 start, 752 end) | ! (II) intel(0): VTOTAL_A: 0x020c01df (480 active, 525 total) | ! (II) intel(0): VBLANK_A: 0x020401e7 (488 start, 517 end) | ! (II) intel(0): VSYNC_A: 0x01eb01e9 (490 start, 492 end) | (II) intel(0): BCLRPAT_A: 0x00000000 | (II) intel(0): VSYNCSHIFT_A: 0x00000000 | ! (II) intel(0): DSPBCNTR: 0xd9000400 (enabled, pipe B) | (II) intel(0): DSPBSTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | (II) intel(0): DSPBBASE: 0x00000000 | ! (II) intel(0): DSPBSURF: 0x00200000 | (II) intel(0): DSPBTILEOFF: 0x00000000 | (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | (II) intel(0): PIPEBSRC: 0x05770419 (1400, 1050) | --- 976,1009 ---- | (II) intel(0): PFIT_PGM_RATIOS: 0x06180750 | (II) intel(0): PORT_HOTPLUG_EN: 0x00000020 | (II) intel(0): PORT_HOTPLUG_STAT: 0x00000400 | ! (II) intel(0): DSPACNTR: 0x58000000 (disabled, pipe A) | ! (II) intel(0): DSPASTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPAPOS: 0x00000000 (0, 0) | (II) intel(0): DSPASIZE: 0x00000000 (1, 1) | (II) intel(0): DSPABASE: 0x00000000 | ! (II) intel(0): DSPASURF: 0x0012b000 | (II) intel(0): DSPATILEOFF: 0x00000000 | (II) intel(0): PIPEACONF: 0x00000000 (disabled, inactive) | (II) intel(0): PIPEASRC: 0x027f01df (640, 480) | (II) intel(0): PIPEASTAT: 0x00000000 (status:) | ! (II) intel(0): FPA0: 0x00021108 (n = 2, m1 = 17, m2 = 8) | (II) intel(0): FPA1: 0x00031108 (n = 3, m1 = 17, m2 = 8) | ! (II) intel(0): DPLL_A: 0x14800c00 (disabled, non-dvo, default clock, | DAC/serial mode, p1 = 8, p2 = 10) | ! (II) intel(0): DPLL_A_MD: 0x00000000 | ! (II) intel(0): HTOTAL_A: 0x033f027f (640 active, 832 total) | ! (II) intel(0): HBLANK_A: 0x033f027f (640 start, 832 end) | ! (II) intel(0): HSYNC_A: 0x02bf0297 (664 start, 704 end) | ! (II) intel(0): VTOTAL_A: 0x020701df (480 active, 520 total) | ! (II) intel(0): VBLANK_A: 0x020701df (480 start, 520 end) | ! (II) intel(0): VSYNC_A: 0x01ea01e8 (489 start, 491 end) | (II) intel(0): BCLRPAT_A: 0x00000000 | (II) intel(0): VSYNCSHIFT_A: 0x00000000 | ! (II) intel(0): DSPBCNTR: 0xd9000000 (enabled, pipe B) | (II) intel(0): DSPBSTRIDE: 0x00001600 (5632 bytes) | (II) intel(0): DSPBPOS: 0x00000000 (0, 0) | (II) intel(0): DSPBSIZE: 0x00000000 (1, 1) | (II) intel(0): DSPBBASE: 0x00000000 | ! (II) intel(0): DSPBSURF: 0x0012b000 | (II) intel(0): DSPBTILEOFF: 0x00000000 | (II) intel(0): PIPEBCONF: 0xc0000000 (enabled, active) | (II) intel(0): PIPEBSRC: 0x05770419 (1400, 1050) | *************** | *** 1243,1249 **** | (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | (II) intel(0): VCLK_POST_DIV: 0x00020002 | ! (II) intel(0): VGACNTRL: 0x80000000 (disabled) | (II) intel(0): TV_CTL: 0x000c00c0 | (II) intel(0): TV_DAC: 0x70000000 | (II) intel(0): TV_CSC_Y: 0x0332012d | --- 1023,1029 ---- | (II) intel(0): VCLK_DIVISOR_VGA0: 0x00031108 | (II) intel(0): VCLK_DIVISOR_VGA1: 0x00031406 | (II) intel(0): VCLK_POST_DIV: 0x00020002 | ! (II) intel(0): VGACNTRL: 0xa2c4008e (disabled) | (II) intel(0): TV_CTL: 0x000c00c0 | (II) intel(0): TV_DAC: 0x70000000 | (II) intel(0): TV_CSC_Y: 0x0332012d | *************** | *** 1264,1271 **** | (II) intel(0): TV_V_CTL_5: 0x000a00f0 | (II) intel(0): TV_V_CTL_6: 0x000900f0 | (II) intel(0): TV_V_CTL_7: 0x000a00f0 | ! (II) intel(0): TV_SC_CTL_1: 0xc1710088 | ! (II) intel(0): TV_SC_CTL_2: 0x4e2d1dc8 | (II) intel(0): TV_SC_CTL_3: 0x00000000 | (II) intel(0): TV_WIN_POS: 0x00360024 | (II) intel(0): TV_WIN_SIZE: 0x02640198 | --- 1044,1051 ---- | (II) intel(0): TV_V_CTL_5: 0x000a00f0 | (II) intel(0): TV_V_CTL_6: 0x000900f0 | (II) intel(0): TV_V_CTL_7: 0x000a00f0 | ! (II) intel(0): TV_SC_CTL_1: 0xc1710087 | ! (II) intel(0): TV_SC_CTL_2: 0x6b405140 | (II) intel(0): TV_SC_CTL_3: 0x00000000 | (II) intel(0): TV_WIN_POS: 0x00360024 | (II) intel(0): TV_WIN_SIZE: 0x02640198 | *************** | *** 1311,1336 **** | (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 | ! (II) intel(0): pipe A dot 25200 n 3 m1 17 m2 8 p1 8 p2 10 | (II) intel(0): pipe B dot 112380 n 3 m1 20 m2 6 p1 3 p2 7 | (II) intel(0): DumpRegsEnd | ! (II) intel(0): Output configuration: | ! (II) intel(0): Pipe A is off | ! (II) intel(0): Display plane A is now disabled and connected to pipe A. | ! (II) intel(0): Pipe B is on | ! (II) intel(0): Display plane B is now enabled and connected to pipe B. | ! (II) intel(0): Output VGA is connected to pipe none | ! (II) intel(0): Output LVDS is connected to pipe B | ! (II) intel(0): Output TMDS-1 is connected to pipe none | ! (II) intel(0): Output TV is connected to pipe none | ! (II) intel(0): [drm] mapped front buffer at 0xe0200000, handle = 0xe0200000 | ! (II) intel(0): [drm] dma control initialized, using IRQ 16 | ! (**) Option "BaudRate" "1200" | ! (**) Option "StopBits" "2" | ! (**) Option "DataBits" "8" | ! (**) Option "Parity" "None" | ! (**) Option "Vmin" "1" | ! (**) Option "Vtime" "0" | ! (**) Option "FlowControl" "None" | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 6 | ! (II) intel(0): xf86BindGARTMemory: bind key 7 at 0x04f34000 (pgoffset 20276) | --- 1091,1115 ---- | (II) intel(0): DPD_AUX_CH_DATA3: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA4: 0x00000000 | (II) intel(0): DPD_AUX_CH_DATA5: 0x00000000 | ! (II) intel(0): pipe A dot 31500 n 2 m1 17 m2 8 p1 8 p2 10 | (II) intel(0): pipe B dot 112380 n 3 m1 20 m2 6 p1 3 p2 7 | (II) intel(0): DumpRegsEnd | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 15 | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 16 | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 17 | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 18 | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 19 | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 20 | ! (II) intel(0): xf86UnbindGARTMemory: unbind key 21 | ! (II) UnloadModule: "kbd" | ! (II) UnloadModule: "mouse" | ! | ! Fatal server error: | ! Caught signal 11. Server aborting | ! | ! | ! Please consult the The X.Org Foundation support | ! at http://wiki.x.org | ! for help. | ! Please also check the log file at "/var/log/Xorg.0.log" for additional information.
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