From nobody Fri Aug 4 17:53:27 2023 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4RHYH41Nk2z4TwjV; Fri, 4 Aug 2023 17:53:36 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4RHYH35vklz4H7K; Fri, 4 Aug 2023 17:53:35 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1691171615; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=uysTpwjp0l0c3hi1PXZFe6NdRW/cxcdIwIsS37IsSJk=; b=t7zEdhrkJVC9DRtczqOD3tP8h+Wd3vHl+g/trDOoIMuhbU5CIlEij2Z5GVco6mW3ai5A3n HQUVOHyZBf8CgiMKPVNaEOaUuMwjCJf+JiIt4JTNA0YuZS9wqh/qlrElVYiWO50XctuCB5 Mbc5Kr/5lvP7kp3KH5W/kRkpPfXMBwqdewisXytvZEaO3H/K84sPKlfcnkNH07m30icBPg ZYSaYik6H+gGWmtEwpOai+CADXs2E04uT8MsBATNA/UwSpchm0kRkmQaEQuregPOl+8/7x gXd/pFpxfU9MAtuehVZM+PLzQ8p55dpg5dHvt1B8yAKyYylXcAdCHqK7/HBADg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1691171615; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=uysTpwjp0l0c3hi1PXZFe6NdRW/cxcdIwIsS37IsSJk=; b=d4EMraGE1WXcuKLOyRIZsxnMrzcpMt+eekPq+rA+rNQIsQWZQ3T+uZjX2V6WMwN5i9zjzs PAmsmrm7ERlYRJuQkI5JRU//koNIv/sdy2bawhG/UZKzw13XoWQubqT1TXRGS23Shs9cCs DIQyEaxo0VcvJH8Ykci0e5XMVGU595V/Fsr4pncituLA03bzj85LcD3ILri9SpOU2qsMzp RfYGKa2evRjLtpj+2mZ64sZITGHXxlxCw9VbjS0egnGDpZW4bvvO9aOIR+W75V49uT3Yuw B/FPekKwGEo4MaNx9FfGHj+yqu5dEY/MtGaCfh7EXyyb7fD65br0psZ69E9B6A== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1691171615; a=rsa-sha256; cv=none; b=H//oUYmDubhX12UvLAsjUSSirNNXS+CIRJ52ds6cTSxWshEGmNfZ5kU80Cs0aUTOeRH9CD nE3Cuv8vaUbZaYEr/dbQBfOepQgodcE4ofm95sr8dF6D+i0zoDb22VpnFSRQkMwzCGVOJF uOKGQqRTjdawmVqX3+HBSfvdrRh+3ute7E+aqYhF3h5j1ZIS0bgGUb398nAr/p5g3WUmET kdw8OG1YDW6Fb06CQkP2PX+/eCMx1v+RqUUtV/0T9XjIa+Kl3YulN92GlIQJ7DHMqerjs1 hKMVtqM9yS7gV+kWZFfkXEqwEhC9wDeQ2r2z7aGlnzn9OlQBM8yubYuzvWi9Jg== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4RHYGw3N21z1BLb; Fri, 4 Aug 2023 17:53:28 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.17.1/8.17.1) with ESMTP id 374HrRsw076210; Fri, 4 Aug 2023 17:53:27 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.17.1/8.17.1/Submit) id 374HrRBP076209; Fri, 4 Aug 2023 17:53:27 GMT (envelope-from git) Date: Fri, 4 Aug 2023 17:53:27 GMT Message-Id: <202308041753.374HrRBP076209@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: a0e20c0ded1a - main - Limit the number of CPUs in the gicv1/2 driver List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-all@freebsd.org X-BeenThere: dev-commits-src-all@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: a0e20c0ded1ae98ec25ded317c6a331fbd40e18c Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=a0e20c0ded1ae98ec25ded317c6a331fbd40e18c commit a0e20c0ded1ae98ec25ded317c6a331fbd40e18c Author: Andrew Turner AuthorDate: 2023-08-04 15:06:44 +0000 Commit: Andrew Turner CommitDate: 2023-08-04 17:47:47 +0000 Limit the number of CPUs in the gicv1/2 driver The GICv2 can only send IPIs to 8 CPUs. Because of this it should only be in machines with no more than 8 cores. Create a new macro to hold this limit to reduce the size of the softc. Reviewed by: emaste Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D41322 --- sys/arm/arm/gic.c | 19 +++++++++++++++---- sys/arm/arm/gic.h | 9 ++++++++- 2 files changed, 23 insertions(+), 5 deletions(-) diff --git a/sys/arm/arm/gic.c b/sys/arm/arm/gic.c index a6f81254fe7d..3ff1276f7a3e 100644 --- a/sys/arm/arm/gic.c +++ b/sys/arm/arm/gic.c @@ -146,7 +146,7 @@ static int gic_debug_spurious = 0; #endif TUNABLE_INT("hw.gic.debug_spurious", &gic_debug_spurious); -static u_int arm_gic_map[MAXCPU]; +static u_int arm_gic_map[GIC_MAXCPU]; static struct arm_gic_softc *gic_sc = NULL; @@ -209,6 +209,7 @@ arm_gic_init_secondary(device_t dev) /* Set the mask so we can find this CPU to send it IPIs */ cpu = PCPU_GET(cpuid); + MPASS(cpu < GIC_MAXCPU); arm_gic_map[cpu] = gic_cpu_mask(sc); for (irq = 0; irq < sc->nirqs; irq += 4) @@ -317,6 +318,12 @@ arm_gic_attach(device_t dev) if (gic_sc) return (ENXIO); + if (mp_ncpus > GIC_MAXCPU) { + device_printf(dev, "Too many CPUs for IPIs to work (%d > %d)\n", + mp_ncpus, GIC_MAXCPU); + return (ENXIO); + } + sc = device_get_softc(dev); if (bus_alloc_resources(dev, arm_gic_spec, sc->gic_res)) { @@ -362,6 +369,7 @@ arm_gic_attach(device_t dev) /* Find the current cpu mask */ mask = gic_cpu_mask(sc); /* Set the mask so we can find this CPU to send it IPIs */ + MPASS(PCPU_GET(cpuid) < GIC_MAXCPU); arm_gic_map[PCPU_GET(cpuid)] = mask; /* Set all four targets to this cpu */ mask |= mask << 8; @@ -649,7 +657,7 @@ gic_bind(struct arm_gic_softc *sc, u_int irq, cpuset_t *cpus) { uint32_t cpu, end, mask; - end = min(mp_ncpus, 8); + end = min(mp_ncpus, GIC_MAXCPU); for (cpu = end; cpu < MAXCPU; cpu++) if (CPU_ISSET(cpu, cpus)) return (EINVAL); @@ -988,9 +996,12 @@ arm_gic_ipi_send(device_t dev, struct intr_irqsrc *isrc, cpuset_t cpus, struct gic_irqsrc *gi = (struct gic_irqsrc *)isrc; uint32_t val = 0, i; - for (i = 0; i < MAXCPU; i++) - if (CPU_ISSET(i, &cpus)) + for (i = 0; i < MAXCPU; i++) { + if (CPU_ISSET(i, &cpus)) { + MPASS(i < GIC_MAXCPU); val |= arm_gic_map[i] << GICD_SGI_TARGET_SHIFT; + } + } gic_d_write_4(sc, GICD_SGIR, val | gi->gi_irq); } diff --git a/sys/arm/arm/gic.h b/sys/arm/arm/gic.h index 5db11a16a4e2..e0780c85fdf9 100644 --- a/sys/arm/arm/gic.h +++ b/sys/arm/arm/gic.h @@ -39,6 +39,13 @@ #ifndef _ARM_GIC_H_ #define _ARM_GIC_H_ +/* The GICv1/2 only supports 8 CPUs */ +#if MAXCPU > 8 +#define GIC_MAXCPU 8 +#else +#define GIC_MAXCPU MAXCPU +#endif + struct arm_gic_softc { device_t gic_dev; void * gic_intrhand; @@ -50,7 +57,7 @@ struct arm_gic_softc { struct mtx mutex; uint32_t nirqs; uint32_t typer; - uint32_t last_irq[MAXCPU]; + uint32_t last_irq[GIC_MAXCPU]; uint32_t gic_iidr; u_int gic_bus;