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From: Marius Strobl <marius@FreeBSD.org>
Date: Mon, 25 Jul 2011 18:44:46 +0000 (UTC)
To: cvs-src-old@freebsd.org
X-FreeBSD-CVS-Branch: RELENG_8
Subject: cvs commit: src/sys/sparc64/sparc64 exception.S interrupt.S
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marius      2011-07-25 18:44:46 UTC

  FreeBSD src repository

  Modified files:        (Branch: RELENG_8)
    sys/sparc64/sparc64  exception.S interrupt.S 
  Log:
  SVN rev 224375 on 2011-07-25 18:44:46Z by marius
  
  MFC: r223721
  
  UltraSPARC-IV CPUs seem to be affected by a not publicly documented
  erratum causing them to trigger stray vector interrupts accompanied by a
  state in which they even fault on locked TLB entries. Just retrying the
  instruction in that case gets the CPU back on track though. OpenSolaris
  also just ignores a certain number of stray vector interrupts.
  While at it, implement the stray vector interrupt handling for SPARC64-VI
  which use these for indicating uncorrectable errors in interrupt packets.
  
  Revision   Changes    Path
  1.80.2.8   +2 -1      src/sys/sparc64/sparc64/exception.S
  1.10.10.4  +24 -0     src/sys/sparc64/sparc64/interrupt.S