From owner-cvs-src-old@FreeBSD.ORG Fri Jun 18 14:16:38 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4E19410656D9 for ; Fri, 18 Jun 2010 14:16:38 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 991E38FC1F for ; Fri, 18 Jun 2010 14:16:34 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id o5IEGYI8032542 for ; Fri, 18 Jun 2010 14:16:34 GMT (envelope-from nwhitehorn@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id o5IEGYdG032541 for cvs-src-old@freebsd.org; Fri, 18 Jun 2010 14:16:34 GMT (envelope-from nwhitehorn@repoman.freebsd.org) Message-Id: <201006181416.o5IEGYdG032541@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to nwhitehorn@repoman.freebsd.org using -f From: Nathan Whitehorn Date: Fri, 18 Jun 2010 14:16:24 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/powerpc/ofw ofw_pcibus.c src/sys/powerpc/powermac uninorth.c src/sys/powerpc/powerpc openpic.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 18 Jun 2010 14:16:38 -0000 nwhitehorn 2010-06-18 14:16:24 UTC FreeBSD src repository Modified files: sys/powerpc/ofw ofw_pcibus.c sys/powerpc/powermac uninorth.c sys/powerpc/powerpc openpic.c Log: SVN rev 209299 on 2010-06-18 14:16:24Z by nwhitehorn Change the default interrupt polarity on PowerPC systems from high to low. On Apple systems at least, all the level interrupts are wired active low. Before this change, our PIC programming only worked because Apple hardware ignores the interrupt polarity bit on all interrupts except IRQ 0. Revision Changes Path 1.5 +21 -9 src/sys/powerpc/ofw/ofw_pcibus.c 1.28 +1 -1 src/sys/powerpc/powermac/uninorth.c 1.25 +1 -1 src/sys/powerpc/powerpc/openpic.c