From owner-freebsd-arm@FreeBSD.ORG Thu Dec 19 11:42:07 2013 Return-Path: Delivered-To: freebsd-arm@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 073C2204 for ; Thu, 19 Dec 2013 11:42:07 +0000 (UTC) Received: from mail-oa0-f54.google.com (mail-oa0-f54.google.com [209.85.219.54]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id C4A151700 for ; Thu, 19 Dec 2013 11:42:06 +0000 (UTC) Received: by mail-oa0-f54.google.com with SMTP id h16so1080916oag.13 for ; Thu, 19 Dec 2013 03:41:59 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:date:message-id:subject:from:to :content-type; bh=Ds7uflX0N9b+9FetvmDoN7CmZS47WwT/IOJfxJRDpp4=; b=WYgqK47HZK+A3OzFkQo6TKW8Q+lifannrIwuZ1+1+rQcZeo5gTzwG58dzGyB6RQuTg 2nr0vfkuzGh1NNv5ms8hELGoIUELouopQEbPAzFtFNGNMN5zAg29Vv1+6ZaL9c2LsWXs Ml+8COifR8YAnxs7h2HRtdIdN2qRBVIdt76qGJyZTbz1D/Bx3JFpE6EbYbxMY1VkUIlx oTm/Mgt5+TLo7AmD4MCee9ovVvyYdFHfZ2ch+tHnjyn3F+zNcwJMifRXOHm/8RccDdAB 2LahjbF8i0laBdHYrFK/WaVgJFdetpQE1uPYM7elOMsIrgMhTE6GwO51PyOEnihmmfpT sHsA== X-Gm-Message-State: ALoCoQlED11x7+OPax6zX3rUZeWFPPHnunFmyTZIL6npJNLF73NSyFUpseLoVz95p/zjzahZfIIe MIME-Version: 1.0 X-Received: by 10.182.48.130 with SMTP id l2mr818594obn.44.1387453319660; Thu, 19 Dec 2013 03:41:59 -0800 (PST) Received: by 10.182.103.231 with HTTP; Thu, 19 Dec 2013 03:41:59 -0800 (PST) Date: Thu, 19 Dec 2013 12:41:59 +0100 Message-ID: Subject: arm SMP on Cortex-A15 From: Wojciech Macek To: freebsd-arm@freebsd.org Content-Type: text/plain; charset=ISO-8859-1 X-Content-Filtered-By: Mailman/MimeDel 2.1.17 X-BeenThere: freebsd-arm@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "Porting FreeBSD to ARM processors." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Dec 2013 11:42:07 -0000 Hi, Finally, I'm able to run FreeBSD stable on Cortex-A15. The TLB issue which was observed, was caused by an aggressive A15 feature called "L2 TLB prefetch". There are 4 fixes that helped: 0. Prerequisite, Olivier's patch for PCPU atomicity. 1. TEX remap - to be compliant with spec, TEX remap is used to configure memory as Inner Shareable 2. TLB flush SE - after each PTE modification and PTE_SYNC, there is no guarantee that newly created entry is not overlapped by old value in TLB cache. Do flush_SE to ensure proper mapping. 3. During context switch, ensure that tlb flush is executed after ttb is changed. Clean BTB to be compliant with specs. Above patches can be found here https://drive.google.com/folderview?id=0B-7yTLrPxaWteWFtWUQxVVNHVFk&usp=sharing None of them is 100%-ready, but should work. Any comments and/or testing are really appreciated. Regards, Wojtek