From owner-svn-src-stable@freebsd.org Sun Sep 30 23:15:46 2018 Return-Path: Delivered-To: svn-src-stable@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E1AC310AAD72; Sun, 30 Sep 2018 23:15:45 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 7AC0376671; Sun, 30 Sep 2018 23:15:45 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 6FF2218D58; Sun, 30 Sep 2018 23:15:45 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id w8UNFjVu056553; Sun, 30 Sep 2018 23:15:45 GMT (envelope-from gonzo@FreeBSD.org) Received: (from gonzo@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id w8UNFikV056550; Sun, 30 Sep 2018 23:15:44 GMT (envelope-from gonzo@FreeBSD.org) Message-Id: <201809302315.w8UNFikV056550@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: gonzo set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko Date: Sun, 30 Sep 2018 23:15:44 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r339030 - stable/11/sys/dev/ichiic X-SVN-Group: stable-11 X-SVN-Commit-Author: gonzo X-SVN-Commit-Paths: stable/11/sys/dev/ichiic X-SVN-Commit-Revision: 339030 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 30 Sep 2018 23:15:46 -0000 Author: gonzo Date: Sun Sep 30 23:15:44 2018 New Revision: 339030 URL: https://svnweb.freebsd.org/changeset/base/339030 Log: MFC r338111, r338215 r338111: [ig4] add ACPI Device HID for AMD platforms Added ACPI Device HID AMDI0010 for the designware I2C controllers in future AMD platforms. Also, when verifying component version check for minimal value instead of exact match. PR: 230641 Submitted by: Rajesh Reviewed by: cem, gonzo Differential Revision: https://reviews.freebsd.org/D16670 r338215: [ig4] Fix I/O timeout issue with Designware I2C controller on AMD platforms Due to hardware limitation AMD I2C controller can't trigger pending interrupt if interrupt status has been changed after clearing interrupt status bits. So, I2C will lose the interrupt and IO will be timed out. Implements a workaround to disable I2C controller interrupt and re-enable I2C interrupt before existing interrupt handler. Submitted by: rajfbsd@gmail.com Differential Revision: https://reviews.freebsd.org/D16720 Modified: stable/11/sys/dev/ichiic/ig4_acpi.c stable/11/sys/dev/ichiic/ig4_iic.c stable/11/sys/dev/ichiic/ig4_reg.h stable/11/sys/dev/ichiic/ig4_var.h Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/dev/ichiic/ig4_acpi.c ============================================================================== --- stable/11/sys/dev/ichiic/ig4_acpi.c Sun Sep 30 23:14:07 2018 (r339029) +++ stable/11/sys/dev/ichiic/ig4_acpi.c Sun Sep 30 23:15:44 2018 (r339030) @@ -60,6 +60,7 @@ static char *ig4iic_ids[] = { "80860F41", "808622C1", "AMDI0510", + "AMDI0010", "APMC0D0F", NULL }; @@ -67,10 +68,20 @@ static char *ig4iic_ids[] = { static int ig4iic_acpi_probe(device_t dev) { + ig4iic_softc_t *sc; + char *hid; - if (acpi_disabled("ig4iic") || - ACPI_ID_PROBE(device_get_parent(dev), dev, ig4iic_ids) == NULL) - return (ENXIO); + sc = device_get_softc(dev); + + if (acpi_disabled("ig4iic")) + return (ENXIO); + + hid = ACPI_ID_PROBE(device_get_parent(dev), dev, ig4iic_ids); + if (hid == NULL) + return (ENXIO); + + if (strcmp("AMDI0010", hid) == 0) + sc->access_intr_mask = 1; device_set_desc(dev, "Designware I2C Controller"); return (0); Modified: stable/11/sys/dev/ichiic/ig4_iic.c ============================================================================== --- stable/11/sys/dev/ichiic/ig4_iic.c Sun Sep 30 23:14:07 2018 (r339029) +++ stable/11/sys/dev/ichiic/ig4_iic.c Sun Sep 30 23:15:44 2018 (r339030) @@ -563,7 +563,7 @@ ig4iic_attach(ig4iic_softc_t *sc) if (sc->version == IG4_HASWELL || sc->version == IG4_ATOM) { v = reg_read(sc, IG4_REG_COMP_VER); - if (v != IG4_COMP_VER) { + if (v < IG4_COMP_MIN_VER) { error = ENXIO; goto done; } @@ -724,6 +724,19 @@ ig4iic_intr(void *cookie) ++sc->rnext; status = reg_read(sc, IG4_REG_I2C_STA); } + + /* + * Workaround to trigger pending interrupt if IG4_REG_INTR_STAT + * is changed after clearing it + */ + if(sc->access_intr_mask) { + status = reg_read(sc, IG4_REG_INTR_MASK); + if(status) { + reg_write(sc, IG4_REG_INTR_MASK, 0); + reg_write(sc, IG4_REG_INTR_MASK, status); + } + } + wakeup(sc); mtx_unlock(&sc->io_lock); } Modified: stable/11/sys/dev/ichiic/ig4_reg.h ============================================================================== --- stable/11/sys/dev/ichiic/ig4_reg.h Sun Sep 30 23:14:07 2018 (r339029) +++ stable/11/sys/dev/ichiic/ig4_reg.h Sun Sep 30 23:15:44 2018 (r339030) @@ -73,7 +73,6 @@ * SDA_HOLD 0x00000001 * SDA_SETUP 0x00000064 * COMP_PARAM1 0x00FFFF6E - * COMP_VER 0x3131352A */ #define IG4_REG_CTL 0x0000 /* RW Control Register */ @@ -552,11 +551,10 @@ /* * COMP_VER - (RO) Component Version Register 22.2.36 - * Default Value 0x3131352A * * Contains the chip version number. All 32 bits. */ -#define IG4_COMP_VER 0x3131352A +#define IG4_COMP_MIN_VER 0x3131352A /* * COMP_TYPE - (RO) (linux) Endian and bus width probe Modified: stable/11/sys/dev/ichiic/ig4_var.h ============================================================================== --- stable/11/sys/dev/ichiic/ig4_var.h Sun Sep 30 23:14:07 2018 (r339029) +++ stable/11/sys/dev/ichiic/ig4_var.h Sun Sep 30 23:15:44 2018 (r339030) @@ -72,6 +72,7 @@ struct ig4iic_softc { int slave_valid : 1; int read_started : 1; int write_started : 1; + int access_intr_mask : 1; /* * Locking semantics: