Date: Tue, 16 Mar 1999 19:25:05 -0600 (CST) From: Joe Greco <jgreco@ns.sol.net> To: Tor.Egge@fast.no Cc: freebsd-smp@freebsd.org Subject: Re: Help, cannot make HP Vectra XU work Message-ID: <199903170125.TAA15269@aurora.sol.net> In-Reply-To: <199811251645.RAA19467@midten.fast.no> from "Tor.Egge@fast.no" at "Nov 25, 1998 5:45: 8 pm"
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Again, my HP Vectra XU 6/200 freaks on 3.1R in SMP. Now it hangs without
printing the intpint lines, otherwise the symptoms are as described last
time. I did confirm that Tor Egge committed the patch he provided that
made this work under 3.0R. Something else must be wrong.
The boot halts after printing
Programming 16 pins in IOAPIC #0
The machine is a 2 x PP200, 160MB machine based on an Orion chipset.
I don't have an easy way to put a serial console on a machine that
netboots, so I'm throwing this troll-for-comments out first to see if
there's anything easier I can do.
% mptable
===============================================================================
MPTable, version 2.0.15
-------------------------------------------------------------------------------
MP Floating Pointer Structure:
location: BIOS
physical address: 0x000f99a0
signature: '_MP_'
length: 16 bytes
version: 1.1
checksum: 0x4b
mode: Virtual Wire
-------------------------------------------------------------------------------
MP Config Table Header:
physical address: 0x000f99b0
signature: 'PCMP'
base table length: 236
version: 1.1
checksum: 0xe0
OEM ID: 'HP '
Product ID: 'XX '
OEM table pointer: 0x00000000
OEM table size: 0
entry count: 21
local APIC address: 0xfee00000
extended table length: 0
extended table checksum: 0
-------------------------------------------------------------------------------
MP Config Base Table Entries:
--
Processors: APIC ID Version State Family Model Step Flags
1 0x11 BSP, usable 6 1 0 0xfbff
0 0x11 AP, usable 6 1 0 0xfbff
--
Bus: Bus ID Type
1 ISA
0 PCI
--
I/O APICs: APIC ID Version State Address
16 0x11 usable 0xfec00000
--
I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
INT conforms conforms 1 1 255 1
INT conforms conforms 1 0 255 2
INT conforms conforms 1 3 255 3
INT conforms conforms 1 4 255 4
INT conforms conforms 1 5 255 5
INT conforms conforms 1 6 255 6
INT conforms conforms 1 7 255 7
INT conforms conforms 1 8 255 8
INT conforms conforms 1 9 255 9
INT conforms conforms 1 10 255 10
INT conforms conforms 1 11 255 11
INT conforms conforms 1 12 255 12
INT conforms conforms 1 13 255 13
INT conforms conforms 1 14 255 14
INT conforms conforms 1 15 255 15
--
Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
NMI conforms conforms 1 2 255 1
-------------------------------------------------------------------------------
# SMP kernel config file options:
# Required:
options SMP # Symmetric MultiProcessor Kernel
options APIC_IO # Symmetric (APIC) I/O
# Optional (built-in defaults will work in most cases):
#options NCPU=2 # number of CPUs
#options NBUS=2 # number of busses
#options NAPIC=1 # number of IO APICs
#options NINTR=24 # number of INTs
===============================================================================
The relevant comments from last time:
> > I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
> > INT conforms conforms 1 1 255 1
> ^^^
>
> Try this patch:
>
> Index: sys/i386/i386/mp_machdep.c
> ===================================================================
> RCS file: /home/ncvs/src/sys/i386/i386/mp_machdep.c,v
> retrieving revision 1.83
> diff -u -r1.83 mp_machdep.c
> --- mp_machdep.c 1998/10/10 13:37:16 1.83
> +++ mp_machdep.c 1998/11/25 16:39:29
> @@ -1197,11 +1197,26 @@
> static int
> int_entry(int_entry_ptr entry, int intr)
> {
> + int apic;
> +
> io_apic_ints[intr].int_type = entry->int_type;
> io_apic_ints[intr].int_flags = entry->int_flags;
> io_apic_ints[intr].src_bus_id = entry->src_bus_id;
> io_apic_ints[intr].src_bus_irq = entry->src_bus_irq;
> - io_apic_ints[intr].dst_apic_id = entry->dst_apic_id;
> + if (entry->dst_apic_id == 255) {
> + /* This signal goes to all IO APICS. Select an IO APIC
> + with sufficient number of interrupt pins */
> + for (apic = 0; apic < mp_napics; apic++)
> + if (((io_apic_read(apic, IOAPIC_VER) &
> + IOART_VER_MAXREDIR) >> MAXREDIRSHIFT) >=
> + entry->dst_apic_int)
> + break;
> + if (apic < mp_napics)
> + io_apic_ints[intr].dst_apic_id = IO_TO_ID(apic);
> + else
> + io_apic_ints[intr].dst_apic_id = entry->dst_apic_id;
> + } else
> + io_apic_ints[intr].dst_apic_id = entry->dst_apic_id;
> io_apic_ints[intr].dst_apic_int = entry->dst_apic_int;
>
> return 1;
>
> - Tor Egge
As always, thanks in advance for any ideas.
... Joe
-------------------------------------------------------------------------------
Joe Greco - Systems Administrator jgreco@ns.sol.net
Solaria Public Access UNIX - Milwaukee, WI 414/342-4847
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