From owner-freebsd-current@freebsd.org Tue Dec 8 04:50:34 2015 Return-Path: Delivered-To: freebsd-current@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 9EECE9C118C for ; Tue, 8 Dec 2015 04:50:34 +0000 (UTC) (envelope-from mmcco@mykolab.com) Received: from mx-out02.mykolab.com (mx01.mykolab.com [95.128.36.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 395A7123A; Tue, 8 Dec 2015 04:50:33 +0000 (UTC) (envelope-from mmcco@mykolab.com) X-Virus-Scanned: amavisd-new at kolabnow.com X-Spam-Flag: NO X-Spam-Score: -2.909 X-Spam-Level: X-Spam-Status: No, score=-2.909 tagged_above=-10 required=6.31 tests=[ALL_TRUSTED=-1, BAYES_00=-1.9, FREEMAIL_FROM=0.001, T_RP_MATCHES_RCVD=-0.01] autolearn=ham Received: from mx04.mykolab.com (mx04.mykolab.com [10.20.7.102]) by mx-out02.mykolab.com (Postfix) with ESMTPS id F3EAE601B0; Tue, 8 Dec 2015 05:50:29 +0100 (CET) Date: Mon, 7 Dec 2015 23:50:25 -0500 From: Michael McConville To: araujo@FreeBSD.org Cc: freebsd-current Subject: Re: [PATCH] XOR uses Message-ID: <20151208045025.GA17698@thinkpad.swarthmore.edu> References: <20151208031327.GA17554@thinkpad.swarthmore.edu> Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: X-Mailman-Approved-At: Tue, 08 Dec 2015 12:16:26 +0000 X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 08 Dec 2015 04:50:34 -0000 Marcelo Araujo wrote: > What would be the advantage of it? Just clarity and readability. > I still prefer explicit than implicit. The current code is much more > readable. I very much disagree. XOR is a basic binary operation, like AND and OR. I don't understand what's more explicit about using 4x the code to reimplement it every time. I don't feel strongly about the patches fate, though. > 2015-12-08 11:13 GMT+08:00 Michael McConville : > > > A minor simplification patch: > > > > > > Index: sys/arm/allwinner/a10_gpio.c > > =================================================================== > > --- sys/arm/allwinner/a10_gpio.c (revision 291978) > > +++ sys/arm/allwinner/a10_gpio.c (working copy) > > @@ -356,10 +356,7 @@ > > sc = device_get_softc(dev); > > A10_GPIO_LOCK(sc); > > data = A10_GPIO_READ(sc, A10_GPIO_GP_DAT(bank)); > > - if (data & (1 << pin)) > > - data &= ~(1 << pin); > > - else > > - data |= (1 << pin); > > + data ^= (1 << pin); > > A10_GPIO_WRITE(sc, A10_GPIO_GP_DAT(bank), data); > > A10_GPIO_UNLOCK(sc); > > > > Index: sys/arm/altera/socfpga/socfpga_gpio.c > > =================================================================== > > --- sys/arm/altera/socfpga/socfpga_gpio.c (revision 291978) > > +++ sys/arm/altera/socfpga/socfpga_gpio.c (working copy) > > @@ -336,10 +336,7 @@ > > > > GPIO_LOCK(sc); > > reg = READ4(sc, GPIO_SWPORTA_DR); > > - if (reg & (1 << i)) > > - reg &= ~(1 << i); > > - else > > - reg |= (1 << i); > > + reg ^= (1 << i); > > WRITE4(sc, GPIO_SWPORTA_DR, reg); > > GPIO_UNLOCK(sc); > > > > Index: sys/arm/rockchip/rk30xx_gpio.c > > =================================================================== > > --- sys/arm/rockchip/rk30xx_gpio.c (revision 291978) > > +++ sys/arm/rockchip/rk30xx_gpio.c (working copy) > > @@ -375,10 +375,7 @@ > > return (EINVAL); > > RK30_GPIO_LOCK(sc); > > data = RK30_GPIO_READ(sc, RK30_GPIO_SWPORT_DR); > > - if (data & (1U << pin)) > > - data &= ~(1U << pin); > > - else > > - data |= (1U << pin); > > + data ^= (1U << pin); > > RK30_GPIO_WRITE(sc, RK30_GPIO_SWPORT_DR, data); > > RK30_GPIO_UNLOCK(sc); > > > > Index: sys/arm/samsung/exynos/exynos5_pad.c > > =================================================================== > > --- sys/arm/samsung/exynos/exynos5_pad.c (revision 291978) > > +++ sys/arm/samsung/exynos/exynos5_pad.c (working copy) > > @@ -722,10 +722,7 @@ > > > > GPIO_LOCK(sc); > > reg = READ4(sc, bank.port, bank.con + 0x4); > > - if (reg & (1 << pin_shift)) > > - reg &= ~(1 << pin_shift); > > - else > > - reg |= (1 << pin_shift); > > + reg ^= (1 << pin_shift); > > WRITE4(sc, bank.port, bank.con + 0x4, reg); > > GPIO_UNLOCK(sc); > > > > Index: sys/dev/nand/nandsim_ctrl.c > > =================================================================== > > --- sys/dev/nand/nandsim_ctrl.c (revision 291978) > > +++ sys/dev/nand/nandsim_ctrl.c (working copy) > > @@ -388,9 +388,6 @@ > > rand = random(); > > if ((rand % 1000000) < chip->error_ratio) { > > bit = rand % 8; > > - if (*byte & (1 << bit)) > > - *byte &= ~(1 << bit); > > - else > > - *byte |= (1 << bit); > > + *byte ^= (1 << bit); > > } > > }