Date: Mon, 28 Sep 1998 06:37:55 +0800 From: Peter Wemm <peter@netplex.com.au> To: Tor.Egge@fast.no Cc: freebsd@magnet.geophysik.tu-freiberg.de, freebsd-scsi@FreeBSD.ORG, freebsd-smp@FreeBSD.ORG Subject: Re: AHA 2742T+CAM+SMP problems 2nd. try #3 Message-ID: <199809272237.GAA00386@spinner.netplex.com.au> In-Reply-To: Your message of "Sun, 27 Sep 1998 21:42:18 %2B0200." <199809271942.VAA01789@midten.fast.no>
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Tor.Egge@fast.no wrote:
> > EISA INTCONTROL = 00000e00
>
> Interrupts 10, 11 and 12 are level sensitive.
9, 10 and 11 actually.. (9 is pci video card, 10 is pci ethernet card, 11
is scsi controller).
This is interesting. When we were first putting this together we came to
the conclusion that the output of the edle/level control system was fed to
both the normal PIC and the IO apic.
After looking at my system (intcontrol = 0x220), it's reporting irq 5 and
9 as level (video and network again), and the Adaptec is (now that I think
about it) on edge trigger mode.
ahc0: <Adaptec 274X SCSI host adapter> at 0x1c00-0x1cff irq 11 on eisa0 slot 1
ahc0: Using Edge Triggered Interrupts
The documentation doesn't say anything about the routing of interrupts on
EISA systems. Also, it's interesting to note that the MPtable is *wrong*
on both his and my systems. (and it's in ROM)
> > ahc0: <Adaptec 274X SCSI host adapter> at 0x1c00-0x1cff irq 11 on eisa0 slo
t 1
> > ahc0: Using Level Sensitive Interrupts
>
> The scsi card generates an active low/level interrupt 11.
And that's the difference between his and my systems.
> With an MP table that says
>
> I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#
> INT conforms conforms 0 11 2 11
>
>
> this means that int pin 11 on the IOAPIC is currently programmed as
> active high/edge trigger.
And the mptable is wrong on all of these systems.
> It should probably be programmed as active high/level trigger. I assume
> you have the MP spec document.
It doesn't help. I seem to recall that there was another problem too.. If
my memory serves, I think PCI was level active low, but EISA was level
active high - or maybe the other way around.. Presumably the ELCR device
knows about this or has some other compensation to make it work.
> If you configure your scsi card to use edge interrupts, you'll probably
> avoid this problem.
Yes.
> Index: mpapic.c
> ===================================================================
> RCS file: /home/ncvs/src/sys/i386/i386/mpapic.c,v
> retrieving revision 1.32
> diff -u -r1.32 mpapic.c
> --- mpapic.c 1998/09/06 22:41:40 1.32
> +++ mpapic.c 1998/09/27 18:39:04
> @@ -303,12 +303,7 @@
> printf("EISA INTCONTROL = %08x\n", intcontrol);
> }
>
> - /*
> - * EISA IRQ's are identical to ISA irq's, regardless of
> - * whether they are edge or level since they go through
> - * the level/polarity converter gadget.
> - */
> - level = 0;
> + level = ((intcontrol >> eirq) & 1);
>
> if (level)
> *flags |= IOART_TRGRLVL;
> @@ -378,7 +373,8 @@
> * level/polarity converter gadget. */
>
> if (level == 1) /* XXX Always false */
> - pol = 0; /* if level, active low */
> + /* level => active high on IO APIC (low on EISA bus) */
> + pol = 1; /* if level, active high */
> else
> pol = 1; /* if edge, high edge */
This should probably work too. We had something like this in the SMP cvs
tree before the merge, but it got backed out. It was probably some other
problem or lack of information, I don't remember the details, but at the
time my 2742 worked under edge trigger best. This is a very grey area in
the MPspec.
> - Tor Egge
Cheers,
-Peter
--
Peter Wemm <peter@netplex.com.au> Netplex Consulting
"No coffee, No workee!" :-)
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