From owner-svn-src-projects@FreeBSD.ORG Mon Nov 9 19:25:30 2009 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 79D4A106568B; Mon, 9 Nov 2009 19:25:30 +0000 (UTC) (envelope-from rrs@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 69EAC8FC17; Mon, 9 Nov 2009 19:25:30 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id nA9JPUX0031562; Mon, 9 Nov 2009 19:25:30 GMT (envelope-from rrs@svn.freebsd.org) Received: (from rrs@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id nA9JPUux031559; Mon, 9 Nov 2009 19:25:30 GMT (envelope-from rrs@svn.freebsd.org) Message-Id: <200911091925.nA9JPUux031559@svn.freebsd.org> From: Randall Stewart Date: Mon, 9 Nov 2009 19:25:30 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r199099 - projects/mips/sys/mips/rmi X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 09 Nov 2009 19:25:30 -0000 Author: rrs Date: Mon Nov 9 19:25:30 2009 New Revision: 199099 URL: http://svn.freebsd.org/changeset/base/199099 Log: Ok we need to have the clock handlers has filters. This gets us up to a mount request :-) Modified: projects/mips/sys/mips/rmi/clock.c projects/mips/sys/mips/rmi/clock.h Modified: projects/mips/sys/mips/rmi/clock.c ============================================================================== --- projects/mips/sys/mips/rmi/clock.c Mon Nov 9 19:22:57 2009 (r199098) +++ projects/mips/sys/mips/rmi/clock.c Mon Nov 9 19:25:30 2009 (r199099) @@ -77,7 +77,7 @@ u_int32_t counter_lower_last = 0; static int scale_factor; static int count_scale_factor[32]; -uint64_t +uint64_t platform_get_frequency() { return XLR_PIC_HZ; @@ -98,7 +98,7 @@ mips_timer_early_init(uint64_t clock_hz) * Handle the clock interrupt when count becomes equal to * compare. */ -void +int count_compare_clockhandler(struct trapframe *tf) { int cpu = PCPU_GET(cpuid); @@ -126,9 +126,10 @@ count_compare_clockhandler(struct trapfr } critical_exit(); + return (FILTER_HANDLED); } -void +int pic_hardclockhandler(struct trapframe *tf) { int cpu = PCPU_GET(cpuid); @@ -154,6 +155,7 @@ pic_hardclockhandler(struct trapframe *t /* If needed , handle count compare tick skew here */ } critical_exit(); + return (FILTER_HANDLED); } int @@ -168,9 +170,10 @@ rmi_early_counter_init() int cpu = PCPU_GET(cpuid); xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET); - /* We do this to get the PIC time counter running right - * after system start. Otherwise the DELAY() function will - * not be able to work since it won't have a TC to read. + /* + * We do this to get the PIC time counter running right after system + * start. Otherwise the DELAY() function will not be able to work + * since it won't have a TC to read. */ xlr_write_reg(mmio, PIC_TIMER_6_MAXVAL_0, (0xffffffff & 0xffffffff)); xlr_write_reg(mmio, PIC_TIMER_6_MAXVAL_1, (0xffffffff & 0xffffffff)); @@ -193,16 +196,16 @@ platform_initclocks(void) */ /* profiling/process accounting timer interrupt for non-zero cpus */ cpu_establish_hardintr("compare", + (driver_filter_t *) count_compare_clockhandler, NULL, - (driver_intr_t *) count_compare_clockhandler, NULL, IRQ_TIMER, INTR_TYPE_CLK | INTR_FAST, &cookie); /* timekeeping timer interrupt for cpu 0 */ cpu_establish_hardintr("hardclk", + (driver_filter_t *) pic_hardclockhandler, NULL, - (driver_intr_t *) pic_hardclockhandler, NULL, PIC_TIMER_7_IRQ, INTR_TYPE_CLK | INTR_FAST, @@ -224,7 +227,7 @@ platform_initclocks(void) /* Setup PIC Interrupt */ if (rmi_spin_mutex_safe) - mtx_lock_spin(&xlr_pic_lock); + mtx_lock_spin(&xlr_pic_lock); xlr_write_reg(mmio, PIC_TIMER_7_MAXVAL_0, (maxval & 0xffffffff)); /* 0x100 + 7 */ xlr_write_reg(mmio, PIC_TIMER_7_MAXVAL_1, (maxval >> 32) & 0xffffffff); /* 0x110 + 7 */ /* 0x40 + 8 */ @@ -242,7 +245,7 @@ platform_initclocks(void) xlr_write_reg(mmio, PIC_IRT_1_TIMER_6, (1 << 31) | (0 << 30) | (1 << 6) | (PIC_TIMER_6_IRQ)); pic_update_control(1 << (8 + 6)); if (rmi_spin_mutex_safe) - mtx_unlock_spin(&xlr_pic_lock); + mtx_unlock_spin(&xlr_pic_lock); } else { /* Setup count-compare interrupt for vcpu[1-31] */ mips_wr_compare((xlr_boot1_info.cpu_frequency) / hz); @@ -250,7 +253,7 @@ platform_initclocks(void) tick_init(); } -unsigned +unsigned __attribute__((no_instrument_function)) platform_get_timecount(struct timecounter *tc __unused) { @@ -290,7 +293,7 @@ DELAY(int n) } static -uint64_t +uint64_t read_pic_counter(void) { xlr_reg_t *mmio = xlr_io_mmio(XLR_IO_PIC_OFFSET); Modified: projects/mips/sys/mips/rmi/clock.h ============================================================================== --- projects/mips/sys/mips/rmi/clock.h Mon Nov 9 19:22:57 2009 (r199098) +++ projects/mips/sys/mips/rmi/clock.h Mon Nov 9 19:25:30 2009 (r199099) @@ -33,8 +33,9 @@ #define XLR_PIC_HZ 66000000U #define XLR_CPU_HZ (xlr_boot1_info.cpu_frequency) -void count_compare_clockhandler(struct trapframe *); -void pic_hardclockhandler(struct trapframe *); +int count_compare_clockhandler(struct trapframe *); +int pic_hardclockhandler(struct trapframe *); int pic_timecounthandler(struct trapframe *); void rmi_early_counter_init(void); + #endif /* _RMI_CLOCK_H_ */