From owner-freebsd-current@FreeBSD.ORG Thu May 26 13:40:38 2011 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 952BD106566B for ; Thu, 26 May 2011 13:40:38 +0000 (UTC) (envelope-from jhb@freebsd.org) Received: from cyrus.watson.org (cyrus.watson.org [65.122.17.42]) by mx1.freebsd.org (Postfix) with ESMTP id 53C828FC12 for ; Thu, 26 May 2011 13:40:38 +0000 (UTC) Received: from bigwig.baldwin.cx (66.111.2.69.static.nyinternet.net [66.111.2.69]) by cyrus.watson.org (Postfix) with ESMTPSA id E307846B0A; Thu, 26 May 2011 09:40:37 -0400 (EDT) Received: from jhbbsd.localnet (unknown [209.249.190.124]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id 8253D8A04F; Thu, 26 May 2011 09:40:37 -0400 (EDT) From: John Baldwin To: freebsd-current@freebsd.org Date: Thu, 26 May 2011 09:40:36 -0400 User-Agent: KMail/1.13.5 (FreeBSD/8.2-CBSD-20110325; KDE/4.5.5; amd64; ; ) References: In-Reply-To: MIME-Version: 1.0 Content-Type: Text/Plain; charset="iso-8859-1" Content-Transfer-Encoding: 7bit Message-Id: <201105260940.37035.jhb@freebsd.org> X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.6 (bigwig.baldwin.cx); Thu, 26 May 2011 09:40:37 -0400 (EDT) Cc: "deeptech71@gmail.com" Subject: Re: pcib allocation failure X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 May 2011 13:40:38 -0000 On Sunday, May 22, 2011 1:20:39 pm deeptech71@gmail.com wrote: > On Sat, May 21, 2011 at 3:59 PM, deeptech71@gmail.com > wrote: > > On Thu, May 19, 2011 at 11:35 PM, John Baldwin wrote: > >> Index: pci_pci.c > >> =================================================================== > >> --- pci_pci.c (revision 222093) > >> +++ pci_pci.c (working copy) > >> @@ -162,8 +162,13 @@ pcib_write_windows(struct pcib_softc *sc, int mask > >> { > >> device_t dev; > >> uint32_t val; > >> + uint16_t cmd; > >> > >> dev = sc->dev; > >> + cmd = pci_read_config(dev, PCIR_COMMAND, 2); > >> + if (cmd & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) > >> + pci_write_config(dev, PCIR_COMMAND, > >> + cmd & ~(PCIM_CMD_PORTEN | PCIM_CMD_MEMEN), 2); > >> if (sc->io.valid && mask & WIN_IO) { > >> val = pci_read_config(dev, PCIR_IOBASEL_1, 1); > >> if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) { > >> @@ -192,6 +197,8 @@ pcib_write_windows(struct pcib_softc *sc, int mask > >> pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2); > >> pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2); > >> } > >> + if (cmd & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) > >> + pci_write_config(dev, PCIR_COMMAND, cmd, 2); > >> } > >> > >> static void > >> @@ -231,7 +238,9 @@ pcib_alloc_window(struct pcib_softc *sc, struct pc > >> w->name, (uintmax_t)w->base, (uintmax_t)w->limit); > >> w->base = max_address; > >> w->limit = 0; > >> +#if 0 > >> pcib_write_windows(sc, w->mask); > >> +#endif > >> return; > >> } > >> pcib_activate_window(sc, type); > > > > that seems to work. > > oops, i forgot to set the AGP aperture size to 128M during testing. > that patch actually does NOT work. Hmmm, I've no idea why this breaks your device. It should just leave the window alone until we shrink it down to the actual window. Ohh, you have two devices behind this bridge that have prefetch ranges. As a hack, can you try this: Index: pci_pci.c =================================================================== --- pci_pci.c (revision 222285) +++ pci_pci.c (working copy) @@ -162,8 +162,13 @@ pcib_write_windows(struct pcib_softc *sc, int mask { device_t dev; uint32_t val; + uint16_t cmd; dev = sc->dev; + cmd = pci_read_config(dev, PCIR_COMMAND, 2); + if (cmd & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) + pci_write_config(dev, PCIR_COMMAND, + cmd & ~(PCIM_CMD_PORTEN | PCIM_CMD_MEMEN), 2); if (sc->io.valid && mask & WIN_IO) { val = pci_read_config(dev, PCIR_IOBASEL_1, 1); if ((val & PCIM_BRIO_MASK) == PCIM_BRIO_32) { @@ -192,6 +197,8 @@ pcib_write_windows(struct pcib_softc *sc, int mask pci_write_config(dev, PCIR_PMBASEL_1, sc->pmem.base >> 16, 2); pci_write_config(dev, PCIR_PMLIMITL_1, sc->pmem.limit >> 16, 2); } + if (cmd & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) + pci_write_config(dev, PCIR_COMMAND, cmd, 2); } static void @@ -337,6 +344,9 @@ pcib_probe_windows(struct pcib_softc *sc) pci_read_config(dev, PCIR_PMLIMITL_1, 2)); max = 0xffffffff; } + /* XXX: Testing hack */ + if (device_get_unit(sc->sc_dev) == 1) + sc->pmem.limit = 0xefffffff; pcib_alloc_window(sc, &sc->pmem, SYS_RES_MEMORY, RF_PREFETCHABLE, max); } -- John Baldwin