From owner-freebsd-stable@FreeBSD.ORG Wed Dec 10 09:55:40 2008 Return-Path: Delivered-To: freebsd-stable@FreeBSD.ORG Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BC8E11065673; Wed, 10 Dec 2008 09:55:40 +0000 (UTC) (envelope-from sos@FreeBSD.ORG) Received: from deepcore.dk (adsl.deepcore.dk [87.63.29.106]) by mx1.freebsd.org (Postfix) with ESMTP id 29DF68FC13; Wed, 10 Dec 2008 09:55:39 +0000 (UTC) (envelope-from sos@FreeBSD.ORG) Received: from [172.18.2.117] (axiell-gw1.novi.dk [77.243.61.137]) by deepcore.dk (8.14.3/8.14.2) with ESMTP id mBA9tZ1O029537; Wed, 10 Dec 2008 10:55:36 +0100 (CET) (envelope-from sos@FreeBSD.ORG) Message-Id: From: =?ISO-8859-1?Q?S=F8ren_Schmidt?= To: Victor Balada Diaz In-Reply-To: <20081210091107.GC1320@alf.bsdes.net> Content-Type: text/plain; charset=ISO-8859-1; format=flowed; delsp=yes Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Apple Message framework v929.2) Date: Wed, 10 Dec 2008 10:55:35 +0100 References: <20081209185236.GA1320@alf.bsdes.net> <493F84A4.1080308@yandex.ru> <20081210091107.GC1320@alf.bsdes.net> X-Mailer: Apple Mail (2.929.2) X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.0 (deepcore.dk [87.63.29.106]); Wed, 10 Dec 2008 10:55:36 +0100 (CET) Cc: "Andrey V. Elsukov" , freebsd-stable@FreeBSD.ORG, freebsd-amd64@FreeBSD.ORG Subject: Re: [ATA] and re(4) stability issues X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 10 Dec 2008 09:55:40 -0000 On 10Dec, 2008, at 10:11 , Victor Balada Diaz wrote: > > Thanks for explaining me what the flags do. I'm not skilled enough =20 > to create > the DMA quirks but if you could give me some patches i'll test them. =20= > Also > if you have any other idea on what could i test or how can i debug =20 > this > it would be more than welcome. Comment out the following two lines in ata_ahci_dmainit(): if (ATA_INL(ctlr->r_res2, ATA_AHCI_CAP) & ATA_AHCI_CAP_64BIT) ch->dma->max_address =3D BUS_SPACE_MAXADDR; And you will not use 64bit DMA even if the chipset supports it. =20 However I have not seen any chipsets supporting this fail, YMMV as =20 usual :) -S=F8ren