From owner-freebsd-stable@FreeBSD.ORG Mon Jul 12 15:52:39 2010 Return-Path: Delivered-To: freebsd-stable@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 8ED2A106566B; Mon, 12 Jul 2010 15:52:39 +0000 (UTC) (envelope-from markus.gebert@hostpoint.ch) Received: from mail.adm.hostpoint.ch (mail.adm.hostpoint.ch [217.26.48.124]) by mx1.freebsd.org (Postfix) with ESMTP id 43D778FC13; Mon, 12 Jul 2010 15:52:39 +0000 (UTC) Received: from [77.109.131.203] (port=61054 helo=ch4buk-en0.office.hostpoint.internal) by mail.adm.hostpoint.ch with esmtpsa (TLSv1:AES128-SHA:128) (Exim 4.69 (FreeBSD)) (envelope-from ) id 1OYLJ7-000LqB-Tj; Mon, 12 Jul 2010 17:52:37 +0200 Mime-Version: 1.0 (Apple Message framework v1078) Content-Type: text/plain; charset=us-ascii From: Markus Gebert In-Reply-To: <20100712154036.GA13481@icarus.home.lan> Date: Mon, 12 Jul 2010 17:52:37 +0200 Content-Transfer-Encoding: quoted-printable Message-Id: <0904AF9E-C14C-4A98-B395-CC1EB4A84393@hostpoint.ch> References: <6B57591F-9FA2-45EB-825F-1DB025C0635D@hostpoint.ch> <201007120851.35529.jhb@freebsd.org> <0CF6CF2B-907C-42EF-B57E-DF50F0564455@hostpoint.ch> <201007121106.59454.jhb@freebsd.org> <4615FFAA-F78B-475E-B40B-CC33791F1D23@hostpoint.ch> <20100712154036.GA13481@icarus.home.lan> To: Jeremy Chadwick X-Mailer: Apple Mail (2.1078) Cc: freebsd-stable , John Baldwin Subject: Re: 8.1-RC2 - PCI fatal error or MCE triggered by USB/ehci on Sun X4100M2? X-BeenThere: freebsd-stable@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Production branch of FreeBSD source code List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 12 Jul 2010 15:52:40 -0000 On 12.07.2010, at 17:40, Jeremy Chadwick wrote: > cx_supported indicates your CPU only supports C1 and not lower > power-saving states (C2/C3/C4, etc.). Non-C1 states can sometimes do > "interesting" things when it comes to interrupt handling. I believe > your system may support the C1E state (given what = machdep.idle_available > shows), but that's often controlled by the system BIOS (on both Intel > and AMD processors, but I'm trying to focus on AMD here). C1E, as far > as I know, is the same as C1 state except can save a little bit more > power. >=20 > I believe neither C1 nor C1E do anything with interrupts, instead just > halting the core when idle/not in use. HLT mode, at least on = multi-core > AMD CPUs, equates to C1E. I see. > Shot in the dark: you're not running powerd(8) on this system are you? No, I'm not. But once in our long series of trial&error, I tried to = enabled it, just to see wether it would trigger something. It didn't, = but the system was not loaded at that time. But I just remebered that I once tried to reproduce the problem with = kern.smp.disabled=3D1 in loader.conf, but with the test load running = only on the BSP, the problem did not seem to occur. Don't know if this = is any of any help though. Markus=