From owner-svn-src-head@freebsd.org Sun Dec 31 22:35:34 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 228B9EAB059; Sun, 31 Dec 2017 22:35:34 +0000 (UTC) (envelope-from kevans@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E0F0367393; Sun, 31 Dec 2017 22:35:33 +0000 (UTC) (envelope-from kevans@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id vBVMZXla082043; Sun, 31 Dec 2017 22:35:33 GMT (envelope-from kevans@FreeBSD.org) Received: (from kevans@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id vBVMZXmr082042; Sun, 31 Dec 2017 22:35:33 GMT (envelope-from kevans@FreeBSD.org) Message-Id: <201712312235.vBVMZXmr082042@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: kevans set sender to kevans@FreeBSD.org using -f From: Kyle Evans Date: Sun, 31 Dec 2017 22:35:33 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r327452 - head/sys/arm/allwinner X-SVN-Group: head X-SVN-Commit-Author: kevans X-SVN-Commit-Paths: head/sys/arm/allwinner X-SVN-Commit-Revision: 327452 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 31 Dec 2017 22:35:34 -0000 Author: kevans Date: Sun Dec 31 22:35:32 2017 New Revision: 327452 URL: https://svnweb.freebsd.org/changeset/base/327452 Log: aw_sid: Add support for a64 Newer Allwinner SoCs have nearly identical SID controllers with efuse space starting at 0x200 into their register space and thermal data available at 0x234, making all of these fairly trivial additions. The h3 will be added at a later time after some testing, due to a silicon bug that causes the rootkey (at least) to be read incorrectly unless first read via the control register. Modified: head/sys/arm/allwinner/aw_sid.c Modified: head/sys/arm/allwinner/aw_sid.c ============================================================================== --- head/sys/arm/allwinner/aw_sid.c Sun Dec 31 22:01:36 2017 (r327451) +++ head/sys/arm/allwinner/aw_sid.c Sun Dec 31 22:35:32 2017 (r327452) @@ -67,6 +67,11 @@ static const struct aw_sid_conf a20_conf = { .rootkey_offset = 0, }; +static const struct aw_sid_conf a64_conf = { + .rootkey_offset = SID_SRAM, + .has_thermal = true, +}; + static const struct aw_sid_conf a83t_conf = { .rootkey_offset = SID_SRAM, .has_thermal = true, @@ -75,6 +80,7 @@ static const struct aw_sid_conf a83t_conf = { static struct ofw_compat_data compat_data[] = { { "allwinner,sun4i-a10-sid", (uintptr_t)&a10_conf}, { "allwinner,sun7i-a20-sid", (uintptr_t)&a20_conf}, + { "allwinner,sun50i-a64-sid", (uintptr_t)&a64_conf}, { "allwinner,sun8i-a83t-sid", (uintptr_t)&a83t_conf}, { NULL, 0 } };