From owner-svn-src-all@freebsd.org Sun Jul 26 18:21:03 2020 Return-Path: Delivered-To: svn-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 9F39D368383; Sun, 26 Jul 2020 18:21:03 +0000 (UTC) (envelope-from jrtc27@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4BFB8H3m2Rz3djM; Sun, 26 Jul 2020 18:21:03 +0000 (UTC) (envelope-from jrtc27@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 6476C11197; Sun, 26 Jul 2020 18:21:03 +0000 (UTC) (envelope-from jrtc27@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 06QIL3aA032206; Sun, 26 Jul 2020 18:21:03 GMT (envelope-from jrtc27@FreeBSD.org) Received: (from jrtc27@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 06QIL25C032203; Sun, 26 Jul 2020 18:21:02 GMT (envelope-from jrtc27@FreeBSD.org) Message-Id: <202007261821.06QIL25C032203@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: jrtc27 set sender to jrtc27@FreeBSD.org using -f From: Jessica Clarke Date: Sun, 26 Jul 2020 18:21:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r363574 - in head/sys: conf riscv/conf riscv/riscv X-SVN-Group: head X-SVN-Commit-Author: jrtc27 X-SVN-Commit-Paths: in head/sys: conf riscv/conf riscv/riscv X-SVN-Commit-Revision: 363574 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.33 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 26 Jul 2020 18:21:03 -0000 Author: jrtc27 Date: Sun Jul 26 18:21:02 2020 New Revision: 363574 URL: https://svnweb.freebsd.org/changeset/base/363574 Log: riscv: Include syscon_power device driver in GENERIC kernel config QEMU's RISC-V virt machine provides syscon-power and syscon-reset devices as the means by which to shutdown and reboot. We also need to ensure that we have attached the syscon_generic device before attaching any syscon_power devices, and so we introduce a new riscv_syscon device akin to aw_syscon added in r327936. Currently the SiFive test finisher is used as the specific implementation of such a syscon device. Reviewed by: br, brooks (mentor), jhb (mentor) Approved by: br, brooks (mentor), jhb (mentor) Obtained from: CheriBSD Differential Revision: https://reviews.freebsd.org/D25725 Added: head/sys/riscv/riscv/riscv_syscon.c (contents, props changed) Modified: head/sys/conf/files.riscv head/sys/riscv/conf/GENERIC Modified: head/sys/conf/files.riscv ============================================================================== --- head/sys/conf/files.riscv Sun Jul 26 18:19:50 2020 (r363573) +++ head/sys/conf/files.riscv Sun Jul 26 18:21:02 2020 (r363574) @@ -57,6 +57,7 @@ riscv/riscv/ofw_machdep.c optional fdt riscv/riscv/plic.c standard riscv/riscv/pmap.c standard riscv/riscv/riscv_console.c optional rcons +riscv/riscv/riscv_syscon.c optional ext_resources syscon riscv_syscon fdt riscv/riscv/sbi.c standard riscv/riscv/soc.c standard riscv/riscv/stack_machdep.c optional ddb | stack Modified: head/sys/riscv/conf/GENERIC ============================================================================== --- head/sys/riscv/conf/GENERIC Sun Jul 26 18:19:50 2020 (r363573) +++ head/sys/riscv/conf/GENERIC Sun Jul 26 18:21:02 2020 (r363574) @@ -77,6 +77,13 @@ options INTRNG # RISC-V SBI console device rcons +# EXT_RESOURCES pseudo devices +options EXT_RESOURCES +device clk +device syscon +device syscon_power +device riscv_syscon + # Bus drivers device pci Added: head/sys/riscv/riscv/riscv_syscon.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/riscv/riscv/riscv_syscon.c Sun Jul 26 18:21:02 2020 (r363574) @@ -0,0 +1,84 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2018 Kyle Evans + * Copyright (c) 2020 Jessica Clarke + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * RISC-V syscon driver. Used as a generic interface by QEMU's virt machine for + * describing the SiFive test finisher as a power and reset controller. + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include + +#include +#include +#include + +#include +#include + +static struct ofw_compat_data compat_data[] = { + {"sifive,test0", 1}, + {"sifive,test1", 1}, + {NULL, 0} +}; + +static int +riscv_syscon_probe(device_t dev) +{ + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) + return (ENXIO); + + device_set_desc(dev, "RISC-V syscon"); + return (BUS_PROBE_DEFAULT); +} + +static device_method_t riscv_syscon_methods[] = { + DEVMETHOD(device_probe, riscv_syscon_probe), + + DEVMETHOD_END +}; + +DEFINE_CLASS_1(riscv_syscon, riscv_syscon_driver, riscv_syscon_methods, + sizeof(struct syscon_generic_softc), syscon_generic_driver); + +static devclass_t riscv_syscon_devclass; +/* riscv_syscon needs to attach prior to syscon_power */ +EARLY_DRIVER_MODULE(riscv_syscon, simplebus, riscv_syscon_driver, + riscv_syscon_devclass, 0, 0, BUS_PASS_SCHEDULER + BUS_PASS_ORDER_LAST); +MODULE_VERSION(riscv_syscon, 1);