Date: Sun, 15 Dec 1996 19:58:05 -0500 (EST) From: "John S. Dyson" <toor@dyson.iquest.net> To: terry@lambert.org (Terry Lambert) Cc: toor@dyson.iquest.net, phk@critter.tfs.com, peter@spinner.dialix.com, dyson@freebsd.org, smp@freebsd.org, haertel@ichips.intel.com Subject: Re: some questions concerning TLB shootdowns in FreeBSD Message-ID: <199612160058.TAA05793@dyson.iquest.net> In-Reply-To: <199612152032.NAA23823@phaeton.artisoft.com> from "Terry Lambert" at Dec 15, 96 01:32:03 pm
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Terry, I am NOT discounting your suggestions -- but I am bringing up challenges associated with your suggestions. > > Some potential optimizations: > > 1) This only applys to written pages not marked copy-on-write; > read-only pages and pages that will be copied on write (like > those in your note about "address spaces are already shared") > You still need to be able to globally invalidate pages that are mapped read-only. (e.g. paging out (where things can happen anytime, or object reclaimation -- that of course doesn't happen unless an object is done with.)) > 2) Flushing can be "lazy" in most cases. That is, the page could > be marked invalid for a particular CPU, and only flushed if > that CPU needs to use it. For a generic first time implementation, > a single unsigned long with CPU invalidity bits could be used > (first time because it places a 32 processor limit, which I > feel is an unacceptable limitation -- I want to run on Connection > Machines some day) as an addition to the page attributes. For > the most part, it is important to realize that this is a > negative validity indicator. This dictates who has to do > the work: the CPU that wants to access the page. The higher > the process CPU affinity, the less this will happen. > There is no special indication of a TLB entry being updated in a processor from the page tables. So, once there is a page table entry created, we have no indication when the processor grabs it (I seem to remember that there are ways for coercing P6's and perhaps P5's into doing it though.) The only way that I would try to do it is to get information from Intel saying that the method is "blessed." It could break things for other (non-Intel) CPU's though. John
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