Date: Fri, 12 May 2017 03:44:20 +0000 (UTC) From: Sepherosa Ziehau <sephe@FreeBSD.org> To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r318208 - stable/10/sys/amd64/pci Message-ID: <201705120344.v4C3iKok003547@repo.freebsd.org>
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Author: sephe Date: Fri May 12 03:44:20 2017 New Revision: 318208 URL: https://svnweb.freebsd.org/changeset/base/318208 Log: MFC 317786 pcicfg: Fix direct calls of pci_cfg{read,write} on systems w/o PCI host bridge. Reported by: dexuan@ Reviewed by: jhb@ Sponsored by: Microsoft Differential Revision: https://reviews.freebsd.org/D10564 Modified: stable/10/sys/amd64/pci/pci_cfgreg.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/amd64/pci/pci_cfgreg.c ============================================================================== --- stable/10/sys/amd64/pci/pci_cfgreg.c Fri May 12 03:06:45 2017 (r318207) +++ stable/10/sys/amd64/pci/pci_cfgreg.c Fri May 12 03:44:20 2017 (r318208) @@ -64,6 +64,7 @@ static vm_offset_t pcie_base; static int pcie_minbus, pcie_maxbus; static uint32_t pcie_badslots; static struct mtx pcicfg_mtx; +MTX_SYSINIT(pcicfg_mtx, &pcicfg_mtx, "pcicfg_mtx", MTX_SPIN); static int mcfg_enable = 1; TUNABLE_INT("hw.pci.mcfg", &mcfg_enable); SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLFLAG_RDTUN, &mcfg_enable, 0, @@ -75,15 +76,9 @@ SYSCTL_INT(_hw_pci, OID_AUTO, mcfg, CTLF int pci_cfgregopen(void) { - static int once = 0; uint64_t pciebar; uint16_t did, vid; - if (!once) { - mtx_init(&pcicfg_mtx, "pcicfg", NULL, MTX_SPIN); - once = 1; - } - if (cfgmech != CFGMECH_NONE) return (1); cfgmech = CFGMECH_1; @@ -139,6 +134,9 @@ pci_cfgregread(int bus, int slot, int fu { uint32_t line; + if (cfgmech == CFGMECH_NONE) + return (0xffffffff); + /* * Some BIOS writers seem to want to ignore the spec and put * 0 in the intline rather than 255 to indicate none. Some use @@ -163,6 +161,9 @@ void pci_cfgregwrite(int bus, int slot, int func, int reg, u_int32_t data, int bytes) { + if (cfgmech == CFGMECH_NONE) + return; + if (cfgmech == CFGMECH_PCIE && (bus >= pcie_minbus && bus <= pcie_maxbus) && (bus != 0 || !(1 << slot & pcie_badslots)))
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