From owner-svn-src-all@freebsd.org Thu May 25 14:25:06 2017 Return-Path: Delivered-To: svn-src-all@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 55641D81B9F; Thu, 25 May 2017 14:25:06 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 27B6112A0; Thu, 25 May 2017 14:25:06 +0000 (UTC) (envelope-from zbb@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v4PEP56k053191; Thu, 25 May 2017 14:25:05 GMT (envelope-from zbb@FreeBSD.org) Received: (from zbb@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v4PEP5SO053190; Thu, 25 May 2017 14:25:05 GMT (envelope-from zbb@FreeBSD.org) Message-Id: <201705251425.v4PEP5SO053190@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: zbb set sender to zbb@FreeBSD.org using -f From: Zbigniew Bodek Date: Thu, 25 May 2017 14:25:05 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r318878 - head/sys/arm/mv X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 25 May 2017 14:25:06 -0000 Author: zbb Date: Thu May 25 14:25:05 2017 New Revision: 318878 URL: https://svnweb.freebsd.org/changeset/base/318878 Log: Add workaround for CESA MBUS windows with 4GB DRAM Armada 38x SoC's equipped with 4GB DRAM suffer freeze during CESA operation, if MBUS window opened at given DRAM CS reaches end of the address space. Apply a workaround by setting the window size to the closest possible value, i.e. divide it by 2 (it has to be power-of-2). Submitted by: Marcin Wojtas Obtained from: Semihalf Sponsored by: Stormshield Differential revision: https://reviews.freebsd.org/D10724 Modified: head/sys/arm/mv/mv_common.c Modified: head/sys/arm/mv/mv_common.c ============================================================================== --- head/sys/arm/mv/mv_common.c Thu May 25 14:23:49 2017 (r318877) +++ head/sys/arm/mv/mv_common.c Thu May 25 14:25:05 2017 (r318878) @@ -1116,6 +1116,7 @@ static void decode_win_cesa_setup(u_long base) { uint32_t br, cr; + uint64_t size; int i, j; for (i = 0; i < MV_WIN_CESA_MAX; i++) { @@ -1128,7 +1129,21 @@ decode_win_cesa_setup(u_long base) if (ddr_is_active(i)) { br = ddr_base(i); - cr = (((ddr_size(i) - 1) & 0xffff0000) | + size = ddr_size(i); +#ifdef SOC_MV_ARMADA38X + /* + * Armada 38x SoC's equipped with 4GB DRAM + * suffer freeze during CESA operation, if + * MBUS window opened at given DRAM CS reaches + * end of the address space. Apply a workaround + * by setting the window size to the closest possible + * value, i.e. divide it by 2. + */ + if (size + ddr_base(i) == 0x100000000ULL) + size /= 2; +#endif + + cr = (((size - 1) & 0xffff0000) | (ddr_attr(i) << IO_WIN_ATTR_SHIFT) | (ddr_target(i) << IO_WIN_TGT_SHIFT) | IO_WIN_ENA_MASK);