From owner-cvs-all@FreeBSD.ORG Fri Oct 24 08:12:56 2003 Return-Path: Delivered-To: cvs-all@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 5502716A4C1 for ; Fri, 24 Oct 2003 08:12:56 -0700 (PDT) Received: from smtp.covadmail.net (mx05.covadmail.net [63.65.120.65]) by mx1.FreeBSD.org (Postfix) with SMTP id 4BF0043FCB for ; Fri, 24 Oct 2003 08:12:51 -0700 (PDT) (envelope-from strick@covad.net) Received: (covad.net 26947 invoked from network); 24 Oct 2003 15:12:45 -0000 Received: from unknown (HELO ice.nodomain) (68.164.174.139) by sun-qmail02 with SMTP; 24 Oct 2003 15:12:44 -0000 Received: from ice.nodomain (localhost [127.0.0.1]) by ice.nodomain (8.12.8p1/8.12.8) with ESMTP id h9OFCe5d001372; Fri, 24 Oct 2003 08:12:40 -0700 (PDT) (envelope-from dan@ice.nodomain) Received: (from dan@localhost) by ice.nodomain (8.12.8p1/8.12.8/Submit) id h9OFCYq3001371; Fri, 24 Oct 2003 08:12:34 -0700 (PDT) Date: Fri, 24 Oct 2003 08:12:34 -0700 (PDT) From: Dan Strick Message-Id: <200310241512.h9OFCYq3001371@ice.nodomain> To: jhb@FreeBSD.org, sos@spider.deepcore.dk In-Reply-To: <200310221959.h9MJxNAX038155@spider.deepcore.dk> cc: strick@covad.net cc: src-committers@FreeBSD.org cc: cvs-src@FreeBSD.org cc: Alexander@Leidinger.net cc: cvs-all@FreeBSD.org cc: sos@FreeBSD.org Subject: Re: cvs commit: src/sys/dev/ata ata-dma.c ata-pci.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Oct 2003 15:12:56 -0000 On Wed, 22 Oct 2003 Soren Schmidt wrote: > > If we are talking about the same thing, current does NOT need that patch > and its also bad on releng4, it clears the error bits which are read > later on for errors... If we are talking about the code in ata_pci_intr() in ata-pci.c that clears the ATA_BMSTAT_INTERRUPT bit in the bus master control block status register and some other bits including the ATA_BMSTAT_ERROR bit, my recommended patch cleared only the interrupt bit but it was changed to be consistent with similar existing code used for other chipsets. John Baldwin wanted to run my version by Soren before using it instead of the similar existing code. Dan Strick strick@covad.net