From owner-svn-src-all@FreeBSD.ORG Fri Dec 20 20:22:10 2013 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id EDB5B906; Fri, 20 Dec 2013 20:22:10 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id DA1B8174E; Fri, 20 Dec 2013 20:22:10 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id rBKKMA2H026552; Fri, 20 Dec 2013 20:22:10 GMT (envelope-from gnn@svn.freebsd.org) Received: (from gnn@localhost) by svn.freebsd.org (8.14.7/8.14.7/Submit) id rBKKMATA026551; Fri, 20 Dec 2013 20:22:10 GMT (envelope-from gnn@svn.freebsd.org) Message-Id: <201312202022.rBKKMATA026551@svn.freebsd.org> From: "George V. Neville-Neil" Date: Fri, 20 Dec 2013 20:22:10 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r259665 - head/sys/dev/hwpmc X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 20 Dec 2013 20:22:11 -0000 Author: gnn Date: Fri Dec 20 20:22:10 2013 New Revision: 259665 URL: http://svnweb.freebsd.org/changeset/base/259665 Log: Add another Haswell model (0x45) to the set of supported chips. Model 0x45 appears, for example, in late 2013 Mac Book Pro models and is properly emulated by VMware. Modified: head/sys/dev/hwpmc/hwpmc_intel.c Modified: head/sys/dev/hwpmc/hwpmc_intel.c ============================================================================== --- head/sys/dev/hwpmc/hwpmc_intel.c Fri Dec 20 20:14:54 2013 (r259664) +++ head/sys/dev/hwpmc/hwpmc_intel.c Fri Dec 20 20:22:10 2013 (r259665) @@ -173,6 +173,7 @@ pmc_intel_initialize(void) nclasses = 3; break; case 0x3C: /* Per Intel document 325462-045US 01/2013. */ + case 0x45: cputype = PMC_CPU_INTEL_HASWELL; nclasses = 5; break;