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Date:      Mon, 27 Jan 2025 21:12:34 GMT
From:      Olivier Certner <olce@FreeBSD.org>
To:        src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org
Subject:   git: 118a280569d3 - stable/13 - atomics: Constify loads: mips
Message-ID:  <202501272112.50RLCYMY030030@gitrepo.freebsd.org>

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The branch stable/13 has been updated by olce:

URL: https://cgit.FreeBSD.org/src/commit/?id=118a280569d3baaee11d1766bf87fbb93cf0a6d0

commit 118a280569d3baaee11d1766bf87fbb93cf0a6d0
Author:     Olivier Certner <olce@FreeBSD.org>
AuthorDate: 2025-01-27 20:49:48 +0000
Commit:     Olivier Certner <olce@FreeBSD.org>
CommitDate: 2025-01-27 21:12:16 +0000

    atomics: Constify loads: mips
    
    I had forgotten that mips had been removed starting from stable/14, and
    didn't compile stable/13 on this architecture...
    
    Consequently, this is a direct commit to stable/13, irrelevant to other
    branches.  It fixes the compile error observed there only, caused by the
    MFC of additional constification commits, including SMR and the
    sanitizers.
    
    Reported by:    Jenkins
---
 sys/mips/include/atomic.h | 34 +++++++++++++++++-----------------
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/sys/mips/include/atomic.h b/sys/mips/include/atomic.h
index f14fa3de65f2..900924a8809e 100644
--- a/sys/mips/include/atomic.h
+++ b/sys/mips/include/atomic.h
@@ -329,22 +329,22 @@ ATOMIC_ACQ_REL(subtract, 64)
 /*
  * We assume that a = b will do atomic loads and stores.
  */
-#define	ATOMIC_STORE_LOAD(WIDTH)			\
-static __inline  uint##WIDTH##_t			\
-atomic_load_acq_##WIDTH(__volatile uint##WIDTH##_t *p)	\
-{							\
-	uint##WIDTH##_t v;				\
-							\
-	v = *p;						\
-	mips_sync();					\
-	return (v);					\
-}							\
-							\
-static __inline  void					\
-atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v)\
-{							\
-	mips_sync();					\
-	*p = v;						\
+#define	ATOMIC_STORE_LOAD(WIDTH)					\
+static __inline  uint##WIDTH##_t					\
+atomic_load_acq_##WIDTH(const __volatile uint##WIDTH##_t *p)		\
+{									\
+	uint##WIDTH##_t v;						\
+									\
+	v = *p;								\
+	mips_sync();							\
+	return (v);							\
+}									\
+									\
+static __inline  void							\
+atomic_store_rel_##WIDTH(__volatile uint##WIDTH##_t *p, uint##WIDTH##_t v) \
+{									\
+	mips_sync();							\
+	*p = v;								\
 }
 
 ATOMIC_STORE_LOAD(32)
@@ -745,7 +745,7 @@ atomic_thread_fence_seq_cst(void)
 	atomic_fcmpset_rel_32((volatile u_int *)(p), (u_int *)(cmpval),	\
 	    (u_int)(newval))
 #define	atomic_load_acq_long(p)						\
-	(u_long)atomic_load_acq_32((volatile u_int *)(p))
+	(u_long)atomic_load_acq_32((const volatile u_int *)(p))
 #define	atomic_store_rel_long(p, v)					\
 	atomic_store_rel_32((volatile u_int *)(p), (u_int)(v))
 #define	atomic_fetchadd_long(p, v)					\



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