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Date: Sat, 14 May 2005 14:09:00 GMT
From: Jean-Yves Lefort <jylefort@FreeBSD.org>
Message-Id: <200505141409.j4EE90m4030708@freefall.freebsd.org>
To: jylefort@FreeBSD.org, freebsd-ports-bugs@FreeBSD.org,
	jylefort@FreeBSD.org
Subject: Re: ports/80968: [NEW PORT] cad/gplcver: A Verilog HDL simulator
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Synopsis: [NEW PORT] cad/gplcver: A Verilog HDL simulator

Responsible-Changed-From-To: freebsd-ports-bugs->jylefort
Responsible-Changed-By: jylefort
Responsible-Changed-When: Sat May 14 14:08:57 GMT 2005
Responsible-Changed-Why: 
Take.

http://www.freebsd.org/cgi/query-pr.cgi?pr=80968