From owner-freebsd-arch@FreeBSD.ORG Sat Sep 13 19:47:13 2014 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 61BB0FDC for ; Sat, 13 Sep 2014 19:47:13 +0000 (UTC) Received: from mail-la0-x22e.google.com (mail-la0-x22e.google.com [IPv6:2a00:1450:4010:c03::22e]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id DF5EECD for ; Sat, 13 Sep 2014 19:47:12 +0000 (UTC) Received: by mail-la0-f46.google.com with SMTP id el20so2712075lab.19 for ; Sat, 13 Sep 2014 12:47:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :cc:content-type; bh=ynjAVIWfjqquwbA8CO1mc+eaYM2T2fQm+2GyPkKxug8=; b=jijbLvmE2c4lfHzxyHjIWGOfpvYJeFWNgMAWeHCFUA/XYrI+jDMqXxqnHpTHr5T3mu qDmOKlX/1DMY9YJJNjisUgTCq6uWxUvmUJZ+Z6DU+Ophdr8HMa2hunwzQ8NpeBsMkLuy Qz1Q3YvUFJC5mzCD3ot5X7cYorWBkpRa4Lb2+xfMuJ7P6YlUnnTpw5r9pRXgaqDC1+Oy MSKy3oT9gtbGt8ipUTNw+y/iQNK2rAx5sxv6UcRDWKjA3sHdVgNbmuWBqBpatYEX5tt9 lFQWzxscL89pk0e3QumCxdToIWH8ah+C24tW9XVgn1AoJKaHA0+bcEgUPLTeAV2DuUvR LsaA== MIME-Version: 1.0 X-Received: by 10.152.36.37 with SMTP id n5mr4595073laj.93.1410637630745; Sat, 13 Sep 2014 12:47:10 -0700 (PDT) Received: by 10.25.42.83 with HTTP; Sat, 13 Sep 2014 12:47:10 -0700 (PDT) In-Reply-To: <20140913162059.GU2737@kib.kiev.ua> References: <20140913162059.GU2737@kib.kiev.ua> Date: Sat, 13 Sep 2014 21:47:10 +0200 Message-ID: Subject: Re: Intel MPX (Skylake ISA) support? From: Carsten Mattner To: Konstantin Belousov Content-Type: text/plain; charset=UTF-8 Cc: freebsd-arch@freebsd.org X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 13 Sep 2014 19:47:13 -0000 On Sat, Sep 13, 2014 at 6:20 PM, Konstantin Belousov wrote: > On Sat, Sep 13, 2014 at 12:45:16PM +0200, Carsten Mattner wrote: >> Are there any plans to include the necessary (kernel, libc) support for >> Intel MPX (https://en.wikipedia.org/wiki/Intel_MPX)? > > I looked at this several times. The 319433 (Instructions Set Extensions > prog reference) even at the current revision 20 still seems to not provide > the complete documentation on the CPU side. E.g., could you point me at > the description of the save area for MPX ? It is required since usermode > bndcfg register can only be set by restoring from the XSAVE area. > > That said, I believe that most, if not all, of the needed kernel-side > support is already there by the generic XSAVE code. > > I never see any specification of runtime services expected by the code > generated by mpx-enabled gcc. Is https://lkml.org/lkml/2014/9/11/182 helpful?