From owner-svn-src-head@FreeBSD.ORG Wed Jan 15 03:57:41 2014 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id E86E938B; Wed, 15 Jan 2014 03:57:41 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id D5C511152; Wed, 15 Jan 2014 03:57:41 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.7/8.14.7) with ESMTP id s0F3vfAl026163; Wed, 15 Jan 2014 03:57:41 GMT (envelope-from marcel@svn.freebsd.org) Received: (from marcel@localhost) by svn.freebsd.org (8.14.7/8.14.7/Submit) id s0F3vf73026162; Wed, 15 Jan 2014 03:57:41 GMT (envelope-from marcel@svn.freebsd.org) Message-Id: <201401150357.s0F3vf73026162@svn.freebsd.org> From: Marcel Moolenaar Date: Wed, 15 Jan 2014 03:57:41 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r260666 - head/sys/ia64/ia64 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.17 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 15 Jan 2014 03:57:42 -0000 Author: marcel Date: Wed Jan 15 03:57:41 2014 New Revision: 260666 URL: http://svnweb.freebsd.org/changeset/base/260666 Log: In the nested TLB fault handler, for a direct-mapped address, make sure to clear the lower 12 bits. We're adding the translation attributes to the physical address and non-zero bits in the first 12 bits would give us something unexpected, including invalid bit values. Those trigger nested general protection faults. We do not have to clear the region bits, because they are ignored anyway, so we can replace an existing dep instruction with the one we need. This fixes GP faults for the swapper thread, as it's the only thread that has a direct-mapped stack. Since the bug is in the nested TLB fault handler, the frequency of hitting the GP is in the order of hours/days under load. Modified: head/sys/ia64/ia64/exception.S Modified: head/sys/ia64/ia64/exception.S ============================================================================== --- head/sys/ia64/ia64/exception.S Wed Jan 15 01:27:01 2014 (r260665) +++ head/sys/ia64/ia64/exception.S Wed Jan 15 03:57:41 2014 (r260666) @@ -1026,7 +1026,7 @@ IVT_ENTRY(Data_Nested_TLB, 0x1400) } { .mii mov cr.itir=r26 -(p12) dep r28=0,r30,61,3 +(p12) dep r28=0,r30,0,12 (p13) extr.u r28=r30,3*PAGE_SHIFT-8, PAGE_SHIFT-3 // dir L0 index ;; }