From owner-svn-src-head@freebsd.org Sun Aug 28 21:32:24 2016 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 7490DB779E5; Sun, 28 Aug 2016 21:32:24 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: from mail-it0-x22e.google.com (mail-it0-x22e.google.com [IPv6:2607:f8b0:4001:c0b::22e]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority G2" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 35A74E65; Sun, 28 Aug 2016 21:32:24 +0000 (UTC) (envelope-from adrian.chadd@gmail.com) Received: by mail-it0-x22e.google.com with SMTP id x131so75732780ite.0; Sun, 28 Aug 2016 14:32:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=y7IX4oA+gJlkBZAH9RNvBCmbIMBsWwAVydD1XY4WXLQ=; b=rpVWlWN1SCHfxNiodTLVP4UYrTZdpAMAHE+VGKVOYdmPihRlQ/33S0PZzqZnxCw4qs 0fPmJup/e0GpTlRgwYMEpNUv92WbmlgiDWlimfA/DKqdtLCVoLBsGCqr00mLALtEkWGW +AHUH4vJJ+5OT4kkXMg0REJnkvE6Iw1fQkOdkT29nZSy6lNIEdtMeuop6saiPuiUVObQ 8VmZJdrtGJWTTk1oR1AQbpF8NI84lb7Bzjomg/gqBnkA477a27Hd3U0L/vrGoW+MpqCp Wpl9pAzoK+Vh9jNAWWZsidxHDVDSNUHQrPn5bKhQszRQXsk/J1UGQA3n+2ELQeektsAM 0RgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=y7IX4oA+gJlkBZAH9RNvBCmbIMBsWwAVydD1XY4WXLQ=; b=NZ9DBACtKfOrU5gUNxxVUdscoeXCOdgElP2aC0pokp2hzyjsHRcXQ5SgZpxzXQr6w2 nW8jNKrxa+DL0rFQ6SPy31bApJGQ5AZxfqhBGWoBTIS73xVM3O1I2p7gjexDW+4u4nV+ g2YConrmu8X7eOXwI91kNW8XuWE3UVPMkxk1CB1kt3vx11tay4Do1KfpHITN9Q3DZjm/ Sd20ZoRAihFysRZbscfJS2oAfcM3z6Dwl9VHb4Wh21aTpKygT3wA0vR+rKSOm8HJgBPb l36uvfnX55IQAh2OX4W3k722bI+6920LHsxripGygtHo+dwAKuPVfg2ErO1druco34db /jhw== X-Gm-Message-State: AE9vXwMIxIQRIqmZ6jF0bxfXg8IV2v7MCEZ8VpwpZ2wQL5u/akyavrz+/E5pZmYNp5ZP8CiPwFNAu0ZE0pciTA== X-Received: by 10.36.239.197 with SMTP id i188mr10190160ith.71.1472419943332; Sun, 28 Aug 2016 14:32:23 -0700 (PDT) MIME-Version: 1.0 Received: by 10.36.141.129 with HTTP; Sun, 28 Aug 2016 14:32:22 -0700 (PDT) Received: by 10.36.141.129 with HTTP; Sun, 28 Aug 2016 14:32:22 -0700 (PDT) In-Reply-To: <201608281934.u7SJYM7P027654@repo.freebsd.org> References: <201608281934.u7SJYM7P027654@repo.freebsd.org> From: Adrian Chadd Date: Sun, 28 Aug 2016 14:32:22 -0700 Message-ID: Subject: Re: svn commit: r304963 - in head/sys/dev/bhnd: . bcma siba To: Landon Fuller Cc: src-committers@freebsd.org, svn-src-head@freebsd.org, svn-src-all@freebsd.org Content-Type: text/plain; charset=UTF-8 X-Content-Filtered-By: Mailman/MimeDel 2.1.22 X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 28 Aug 2016 21:32:24 -0000 Heh. Make a free function too. ;) On Aug 28, 2016 12:34 PM, "Landon J. Fuller" wrote: > Author: landonf > Date: Sun Aug 28 19:34:22 2016 > New Revision: 304963 > URL: https://svnweb.freebsd.org/changeset/base/304963 > > Log: > bhnd(4): Add a bhnd bus method for fetching the device's core table. > > This will allow us to perform bhndb(4) bridge configuration based on > the identified hardware, prior to performing full enumeration of the > child bhnd bus. > > Approved by: adrian (mentor, implicit) > > Modified: > head/sys/dev/bhnd/bcma/bcma.c > head/sys/dev/bhnd/bhnd.h > head/sys/dev/bhnd/bhnd_bus_if.m > head/sys/dev/bhnd/siba/siba.c > > Modified: head/sys/dev/bhnd/bcma/bcma.c > ============================================================ > ================== > --- head/sys/dev/bhnd/bcma/bcma.c Sun Aug 28 19:33:09 2016 > (r304962) > +++ head/sys/dev/bhnd/bcma/bcma.c Sun Aug 28 19:34:22 2016 > (r304963) > @@ -492,6 +492,42 @@ bcma_free_bhnd_dinfo(device_t dev, struc > bcma_free_dinfo(dev, (struct bcma_devinfo *)dinfo); > } > > + > +static int > +bcma_get_core_table(device_t dev, device_t child, struct bhnd_core_info > **cores, > + u_int *num_cores) > +{ > + struct bcma_softc *sc; > + struct bcma_erom erom; > + const struct bhnd_chipid *cid; > + struct resource *r; > + int error; > + int rid; > + > + sc = device_get_softc(dev); > + > + /* Map the EROM table. */ > + cid = BHND_BUS_GET_CHIPID(dev, dev); > + rid = 0; > + r = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, cid->enum_addr, > + cid->enum_addr + BCMA_EROM_TABLE_SIZE, BCMA_EROM_TABLE_SIZE, > + RF_ACTIVE); > + if (r == NULL) { > + device_printf(dev, "failed to allocate EROM resource\n"); > + return (ENXIO); > + } > + > + /* Enumerate all declared cores */ > + if ((error = bcma_erom_open(&erom, r, BCMA_EROM_TABLE_START))) > + goto cleanup; > + > + error = bcma_erom_get_core_info(&erom, cores, num_cores); > + > +cleanup: > + bus_release_resource(dev, SYS_RES_MEMORY, rid, r); > + return (error); > +} > + > /** > * Scan a device enumeration ROM table, adding all valid discovered cores > to > * the bus. > @@ -577,6 +613,7 @@ static device_method_t bcma_methods[] = > DEVMETHOD(bhnd_bus_find_hostb_device, bcma_find_hostb_device), > DEVMETHOD(bhnd_bus_alloc_devinfo, bcma_alloc_bhnd_dinfo), > DEVMETHOD(bhnd_bus_free_devinfo, bcma_free_bhnd_dinfo), > + DEVMETHOD(bhnd_bus_get_core_table, bcma_get_core_table), > DEVMETHOD(bhnd_bus_reset_core, bcma_reset_core), > DEVMETHOD(bhnd_bus_suspend_core, bcma_suspend_core), > DEVMETHOD(bhnd_bus_read_config, bcma_read_config), > > Modified: head/sys/dev/bhnd/bhnd.h > ============================================================ > ================== > --- head/sys/dev/bhnd/bhnd.h Sun Aug 28 19:33:09 2016 (r304962) > +++ head/sys/dev/bhnd/bhnd.h Sun Aug 28 19:34:22 2016 (r304963) > @@ -425,6 +425,32 @@ bhnd_get_chipid(device_t dev) { > }; > > /** > + * Get a list of all cores discoverable on the bhnd bus. > + * > + * Enumerates all cores discoverable on @p dev, returning the list in > + * @p cores and the count in @p num_cores. > + * > + * The memory allocated for the list should be freed using > + * `free(*cores, M_BHND)`. @p cores and @p num_cores are not changed > + * when an error is returned. > + * > + * @param dev A bhnd bus child device. > + * @param[out] cores The table of core descriptors. > + * @param[out] num_cores The number of core descriptors in @p cores. > + * > + * @retval 0 success > + * @retval non-zero if an error occurs enumerating @p dev, a regular > UNIX > + * error code should be returned. > + */ > +static inline int > +bhnd_get_core_table(device_t dev, struct bhnd_core_info **cores, > + u_int *num_cores) > +{ > + return (BHND_BUS_GET_CORE_TABLE(device_get_parent(dev), dev, > cores, > + num_cores)); > +} > + > +/** > * If supported by the chipset, return the clock source for the given > clock. > * > * This function is only supported on early PWRCTL-equipped chipsets > > Modified: head/sys/dev/bhnd/bhnd_bus_if.m > ============================================================ > ================== > --- head/sys/dev/bhnd/bhnd_bus_if.m Sun Aug 28 19:33:09 2016 > (r304962) > +++ head/sys/dev/bhnd/bhnd_bus_if.m Sun Aug 28 19:34:22 2016 > (r304963) > @@ -56,6 +56,13 @@ CODE { > panic("bhnd_bus_get_chipid unimplemented"); > } > > + static int > + bhnd_bus_null_get_core_table(device_t dev, device_t child, > + struct bhnd_core_info **cores, u_int *num_cores) > + { > + panic("bhnd_bus_get_core_table unimplemented"); > + } > + > static bhnd_attach_type > bhnd_bus_null_get_attach_type(device_t dev, device_t child) > { > @@ -271,6 +278,32 @@ METHOD const struct bhnd_chipid * get_ch > } DEFAULT bhnd_bus_null_get_chipid; > > /** > + * Get a list of all cores discoverable on @p dev. > + * > + * Enumerates all cores discoverable on @p dev, returning the list in > + * @p cores and the count in @p num_cores. > + * > + * The memory allocated for the list should be freed using > + * `free(*cores, M_BHND)`. @p cores and @p num_cores are not changed > + * when an error is returned. > + * > + * @param dev The bhnd bus device. > + * @param child The requesting bhnd bus child. > + * @param[out] cores The table of core descriptors. > + * @param[out] num_cores The number of core descriptors in @p cores. > + * > + * @retval 0 success > + * @retval non-zero if an error occurs enumerating @p dev, a regular > UNIX > + * error code should be returned. > + */ > +METHOD int get_core_table { > + device_t dev; > + device_t child; > + struct bhnd_core_info **cores; > + u_int *num_cores; > +} DEFAULT bhnd_bus_null_get_core_table; > + > +/** > * Return the BHND attachment type of the parent bus. > * > * @param dev The device whose child is being examined. > > Modified: head/sys/dev/bhnd/siba/siba.c > ============================================================ > ================== > --- head/sys/dev/bhnd/siba/siba.c Sun Aug 28 19:33:09 2016 > (r304962) > +++ head/sys/dev/bhnd/siba/siba.c Sun Aug 28 19:34:22 2016 > (r304963) > @@ -504,6 +504,76 @@ siba_free_bhnd_dinfo(device_t dev, struc > siba_free_dinfo(dev, (struct siba_devinfo *)dinfo); > } > > + > +static int > +siba_get_core_table(device_t dev, device_t child, struct bhnd_core_info > **cores, > + u_int *num_cores) > +{ > + const struct bhnd_chipid *chipid; > + struct bhnd_core_info *table; > + struct bhnd_resource *r; > + int error; > + int rid; > + > + /* Fetch the core count from our chip identification */ > + chipid = BHND_BUS_GET_CHIPID(dev, dev); > + > + /* Allocate our local core table */ > + table = malloc(sizeof(*table) * chipid->ncores, M_BHND, M_NOWAIT); > + if (table == NULL) > + return (ENOMEM); > + > + /* Enumerate all cores. */ > + for (u_int i = 0; i < chipid->ncores; i++) { > + struct siba_core_id cid; > + uint32_t idhigh, idlow; > + > + /* Map the core's register block */ > + rid = 0; > + r = bhnd_alloc_resource(dev, SYS_RES_MEMORY, &rid, > + SIBA_CORE_ADDR(i), SIBA_CORE_ADDR(i) + SIBA_CORE_SIZE > - 1, > + SIBA_CORE_SIZE, RF_ACTIVE); > + if (r == NULL) { > + error = ENXIO; > + goto failed; > + } > + > + /* Read the core info */ > + idhigh = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_IDHIGH)) > ; > + idlow = bhnd_bus_read_4(r, SB0_REG_ABS(SIBA_CFG0_IDLOW)); > + > + cid = siba_parse_core_id(idhigh, idlow, i, 0); > + table[i] = cid.core_info; > + > + /* Determine unit number */ > + for (u_int j = 0; j < i; j++) { > + if (table[j].vendor == table[i].vendor && > + table[j].device == table[i].device) > + table[i].unit++; > + } > + > + /* Release our resource */ > + bhnd_release_resource(dev, SYS_RES_MEMORY, rid, r); > + r = NULL; > + } > + > + /* Provide the result values (performed last to avoid modifying > + * cores/num_cores if enumeration failed). */ > + *cores = table; > + *num_cores = chipid->ncores; > + > + return (0); > + > +failed: > + if (table != NULL) > + free(table, M_BHND); > + > + if (r != NULL) > + bhnd_release_resource(dev, SYS_RES_MEMORY, rid, r); > + > + return (error); > +} > + > /** > * Scan the core table and add all valid discovered cores to > * the bus. > @@ -696,6 +766,7 @@ static device_method_t siba_methods[] = > > /* BHND interface */ > DEVMETHOD(bhnd_bus_find_hostb_device, siba_find_hostb_device), > + DEVMETHOD(bhnd_bus_get_core_table, siba_get_core_table), > DEVMETHOD(bhnd_bus_alloc_devinfo, siba_alloc_bhnd_dinfo), > DEVMETHOD(bhnd_bus_free_devinfo, siba_free_bhnd_dinfo), > DEVMETHOD(bhnd_bus_reset_core, siba_reset_core), > >