Date: Wed, 11 Sep 1996 14:18:52 +0200 (MET DST) From: sos@freebsd.org To: kato@eclogite.eps.nagoya-u.ac.jp (KATO Takenori) Cc: current@freebsd.org Subject: Re: patch for Cyrix/Ti 486SLC/DLC CPU bug Message-ID: <199609111218.OAA28282@ra.dkuug.dk> In-Reply-To: <199609111139.UAA00456@marble.eps.nagoya-u.ac.jp> from "KATO Takenori" at Sep 11, 96 08:39:15 pm
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In reply to KATO Takenori who wrote:
>
> Hi, Cyrix/Ti 486 users,
>
> Some version of Cyrix 486SLC/DLC and TI 486DLC have paging related
> bug, and they cause strange segmentation fault and/or page fault
> trap. I got some information for that bug and fix, and I made the
> patch for FreeBSD-current.
>
> The patch contains:
>
> 1) FPU exception is handled by interrupt gate (machdep.c).
> 2) The function trap gets fault page address as soon as possible
> (trap.c).
> 3) The functions pmap_update_{1,2}pg don't use LMSW instruction
> but call pmap_update in cpufunc.h (pmap.c).
>
> 1 and 2 are effective for strange signal 11, and 3 is for page fault.
>
> These change are #ifdef'ed because it might have disadvantage for
> system performance. Please add "options CYRIX_486_BUG" line in your
> kernel configuration file to enable bug fix.
>
> Above change has been already included in sys/pc98/i386 stuffs of
> FreeBSD-current, and it has been tested Cyrix/Ti 486 users on PC-9801
> architecture.
>
> Is this effective for you? Comment please!
I have an old board lying around that I ditched for exactly this
reason, I'll try dig it out and test this soon !
-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-
Soren Schmidt (sos@FreeBSD.org) FreeBSD Core Team
So much code to hack -- so little time.
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