Date: Sun, 19 Mar 1995 00:04:58 -0800 (PST) From: "Rodney W. Grimes" <rgrimes@gndrsh.aac.dev.com> To: phk@ref.tfs.com (Poul-Henning Kamp) Cc: nate@sneezy.sri.com, hackers@FreeBSD.org, core@FreeBSD.org Subject: Re: NMI Error success story Message-ID: <199503190804.AAA22818@gndrsh.aac.dev.com> In-Reply-To: <199503190649.WAA22415@ref.tfs.com> from "Poul-Henning Kamp" at Mar 18, 95 10:49:01 pm
next in thread | previous in thread | raw e-mail | index | archive | help
> > > But, I did notice that the static cache rams on the new motherboard were > > 15ns, and on my old (buggy) motherboard they were 25ns. Because I had > > nothing to lose and feeling like I couldn't make the problem any worse I > > swapped the cache chips on the motherboards. > > I will add that I did the same surgery on my machine, which worked fine > before and after, with the lefthand spin to it that it ran around 10% faster > afterwards because I could get the cache burst down to 3-1-1-1 instead of > 3-2-2-2. Humm.. 3+1+1+1 = 6, 3+2+2+2=9, should have been 30% faster if everything hit the cache, figure an actual cache hit rate of 80% and you should have seen a 24% performance increase by this. 1/25ns SRAM should give you 40Mhz operation, but you need setup and hold times + board delay which is atleast 5 ns, resuting in 1/30nS or 33Mhz, very very marginal. 1/20ns + 5 ns should give reliable 33Mhz operation. More than likely it was tag compare delay that caused the problem nate saw, and the ability of Poul to go to a 3-1-1-1 burst. Many motherboards use a 15nS cache tag SRAM and 20nS cache data rams. Many of the new P54C motherboards are specing 12nS or faster SRAMS if you want to run the 100Mhz CPU. [ASUS new triton based board uses 10nS Pipelined Burst SRAMS to achive a 2-1-1-1 cache burst cycle). -- Rod Grimes rgrimes@gndrsh.aac.dev.com Accurate Automation Company Custom computers for FreeBSD
Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199503190804.AAA22818>