From owner-freebsd-hackers  Tue Mar  5 13:44:45 1996
Return-Path: owner-hackers
Received: (from root@localhost)
          by freefall.freebsd.org (8.7.3/8.7.3) id NAA27598
          for hackers-outgoing; Tue, 5 Mar 1996 13:44:45 -0800 (PST)
Received: from tellab5.lisle.tellabs.com (tellab5.lisle.tellabs.com [138.111.243.28])
          by freefall.freebsd.org (8.7.3/8.7.3) with SMTP id NAA27592
          Tue, 5 Mar 1996 13:44:42 -0800 (PST)
From: mikebo@tellabs.com
Received: from sunc210.tellabs.com by tellab5.lisle.tellabs.com with smtp
	(Smail3.1.29.1 #4) id m0tu4Wh-000jGLC; Tue, 5 Mar 96 15:44 CST
Received: by sunc210.tellabs.com (SMI-8.6/1.9)
	id PAA02531; Tue, 5 Mar 1996 15:44:06 -0600
Message-Id: <199603052144.PAA02531@sunc210.tellabs.com>
Subject: Re: Triton-II support... when?
To: terry@lambert.org (Terry Lambert)
Date: Tue, 5 Mar 1996 15:44:06 -0600 (CST)
Cc: mikebo (Mike Borowiec), questions@freebsd.org, hackers@freebsd.org
In-Reply-To: <199603052047.NAA09028@phaeton.artisoft.com> from "Terry Lambert" at Mar 5, 96 01:47:33 pm
X-Mailer: ELM [version 2.4 PL24]
MIME-Version: 1.0
Content-Type: text/plain; charset=US-ASCII
Content-Transfer-Encoding: 7bit
Sender: owner-hackers@freebsd.org
Precedence: bulk

Terry Lambert wrote:
> > o  Will FreeBSD 2.1-RELEASE boot/run on Triton-II main boards as-is?
> 
> Will FreeBSD 2.1-RELEASE boot/run on a P5 without the floating point
> bug?  The question is basically a non-sequitur -- there is no function
> difference in the chipsets except the Triton-II happens to work.
> 
Are a lot of people running FreeBSD with their Level-2 caches off?

> 
> FreeBSD supports the Triton chipset.  Since the difference between the
> I and II is the cache bug is fixed in the II, I can't see where fixing
> a bug could make it not run.
> 
As I understand it, there are much more profound changes than simply
one bug fix. I've been told that Triton-II:
o  fixes a write-back cache bug
o  nominally speeds all memory accesses ~5%
o  adds support for concurrent PCI/ISA bus accesses
o  adds support for multi-processing
o  adds support for ECC memory

Seems like a *lot* more functionality than can be accounted for by a
simple bug fix, no? Perhaps Terry means Triton-II implements a superset
of Triton-I functionality (plus the cache bug fix) so there's no reason
existing kernel code would break? That's great... I thought perhaps
there was more purpose to the chipset sensing code in
/usr/src/sys/pci/pcisupport.c .
- Mike
-- 
--------------------------------------------------------------------------
Michael Borowiec   -   mikebo@tellabs.com   -   Tellabs Operations Inc.
Senior Member of Technical Staff                4951 Indiana Avenue, MS 63
708-512-8211  FAX: 708-512-7099                 Lisle, IL  60532  USA
--------------------------------------------------------------------------