From owner-freebsd-current@FreeBSD.ORG Sat Jun 19 13:18:06 2004 Return-Path: Delivered-To: freebsd-current@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 5AE6116A4CE for ; Sat, 19 Jun 2004 13:18:06 +0000 (GMT) Received: from mailout1.pacific.net.au (mailout1.pacific.net.au [61.8.0.84]) by mx1.FreeBSD.org (Postfix) with ESMTP id D535143D45 for ; Sat, 19 Jun 2004 13:18:05 +0000 (GMT) (envelope-from bde@zeta.org.au) Received: from mailproxy1.pacific.net.au (mailproxy1.pacific.net.au [61.8.0.86])i5JDHw4u013828; Sat, 19 Jun 2004 23:17:58 +1000 Received: from gamplex.bde.org (katana.zip.com.au [61.8.7.246]) i5JDHuao028314; Sat, 19 Jun 2004 23:17:57 +1000 Date: Sat, 19 Jun 2004 23:17:54 +1000 (EST) From: Bruce Evans X-X-Sender: bde@gamplex.bde.org To: Divacky Roman In-Reply-To: <20040619112840.GC94870@stud.fit.vutbr.cz> Message-ID: <20040619230557.H1028@gamplex.bde.org> References: <20040618104954.GA63085@stud.fit.vutbr.cz> <20040619171345.R3813@gamplex.bde.org> <20040619112840.GC94870@stud.fit.vutbr.cz> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII cc: current@freebsd.org Subject: Re: strange message appearing in a fresh current X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 19 Jun 2004 13:18:06 -0000 On Sat, 19 Jun 2004, Divacky Roman wrote: > > > built for i686 cpu (amd duron) with -O -pipe > > > > Hmm. Don't Durons have FXSR? (I686_CPU or CPU_ENABLE_SSE) and not > > CPU_DISABLE_SSE together with a CPU that supports FXSR should give > > a configuration that is not affected by the bug. > > Origin = "AuthenticAMD" Id = 0x631 Stepping = 1 > Features=0x183f9ff > AMD Features=0xc0440000 > > I just set > cpu I686_CPU > > no CPU_* at all. And the bug is there... Ah. It needs SSE in the cpuid too, and your Duron doesn't have it. I think Athlons got SSE starting with the XP. The configuration of this is confusing. From i386/initcpu.c: % #if !defined(CPU_ENABLE_SSE) && defined(I686_CPU) % #define CPU_ENABLE_SSE % #endif % #if defined(CPU_DISABLE_SSE) % #undef CPU_ENABLE_SSE % #endif So I686_CPU gives CPU_ENABLE_SSE unless you use CPU_DISABLE_SSE. % /* % * Initialize CR4 (Control register 4) to enable SSE instructions. % */ % void % enable_sse(void) % { % #if defined(CPU_ENABLE_SSE) % if ((cpu_feature & CPUID_XMM) && (cpu_feature & CPUID_FXSR)) { % load_cr4(rcr4() | CR4_FXSR | CR4_XMM); % cpu_fxsr = hw_instruction_sse = 1; % } % #endif % } Here CPUID_XMM is a confusing alias for CPUID_SSE (the identifcation message only prints "SSE"). So to get cpu_fxsr, you need CPU_ENABLE_SSE or I686_CPU && !CPU_DISABLE_SSE in the FreeBSD config, and SSE and FXSR in the hardware. % } else if (strcmp(cpu_vendor, "AuthenticAMD") == 0) { % #if defined(I686_CPU) && defined(CPU_ATHLON_SSE_HACK) % /* % * Sometimes the BIOS doesn't enable SSE instructions. % * According to AMD document 20734, the mobile % * Duron, the (mobile) Athlon 4 and the Athlon MP % * support SSE. These correspond to cpu_id 0x66X % * or 0x67X. % */ % if ((cpu_feature & CPUID_XMM) == 0 && % ((cpu_id & ~0xf) == 0x660 || % (cpu_id & ~0xf) == 0x670 || % (cpu_id & ~0xf) == 0x680)) { % u_int regs[4]; % wrmsr(0xC0010015, rdmsr(0xC0010015) & ~0x08000); % do_cpuid(1, regs); % cpu_feature = regs[3]; % } % #endif And for broken BIOSes, CPU_ATHLON_SSE_HACK is also needed to get SSE. Bruce