From owner-cvs-all@FreeBSD.ORG Sat Jun 9 21:55:18 2007 Return-Path: X-Original-To: cvs-all@FreeBSD.org Delivered-To: cvs-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [69.147.83.52]) by hub.freebsd.org (Postfix) with ESMTP id 28AE616A468; Sat, 9 Jun 2007 21:55:18 +0000 (UTC) (envelope-from marcel@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [69.147.83.41]) by mx1.freebsd.org (Postfix) with ESMTP id 186F013C457; Sat, 9 Jun 2007 21:55:18 +0000 (UTC) (envelope-from marcel@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.13.8/8.13.8) with ESMTP id l59LtH9i040903; Sat, 9 Jun 2007 21:55:17 GMT (envelope-from marcel@repoman.freebsd.org) Received: (from marcel@localhost) by repoman.freebsd.org (8.13.8/8.13.8/Submit) id l59LtHtg040898; Sat, 9 Jun 2007 21:55:17 GMT (envelope-from marcel) Message-Id: <200706092155.l59LtHtg040898@repoman.freebsd.org> From: Marcel Moolenaar Date: Sat, 9 Jun 2007 21:55:17 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/powerpc/include cpu.h kdb.h md_var.h src/sys/powerpc/powerpc db_interface.c syncicache.c uio_machdep.c src/sys/amd64/include kdb.h src/sys/arm/include kdb.h src/sys/gdb gdb_packet.c src/sys/i386/include kdb.h src/sys/ia64/include kdb.h ... X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 09 Jun 2007 21:55:18 -0000 marcel 2007-06-09 21:55:17 UTC FreeBSD src repository Modified files: sys/powerpc/include cpu.h kdb.h md_var.h sys/powerpc/powerpc db_interface.c syncicache.c uio_machdep.c sys/amd64/include kdb.h sys/arm/include kdb.h sys/gdb gdb_packet.c sys/i386/include kdb.h sys/ia64/include kdb.h sys/sparc64/include kdb.h sys/sun4v/include kdb.h Log: Add kdb_cpu_sync_icache(), intended to synchronize instruction caches with data caches after writing to memory. This typically is required to make breakpoints work on ia64 and powerpc. For those architectures the function is implemented. Revision Changes Path 1.4 +5 -0 src/sys/amd64/include/kdb.h 1.4 +5 -0 src/sys/arm/include/kdb.h 1.4 +8 -2 src/sys/gdb/gdb_packet.c 1.4 +5 -0 src/sys/i386/include/kdb.h 1.5 +15 -0 src/sys/ia64/include/kdb.h 1.21 +0 -6 src/sys/powerpc/include/cpu.h 1.4 +7 -0 src/sys/powerpc/include/kdb.h 1.28 +6 -0 src/sys/powerpc/include/md_var.h 1.7 +6 -10 src/sys/powerpc/powerpc/db_interface.c 1.6 +1 -1 src/sys/powerpc/powerpc/syncicache.c 1.7 +1 -1 src/sys/powerpc/powerpc/uio_machdep.c 1.4 +5 -0 src/sys/sparc64/include/kdb.h 1.2 +5 -0 src/sys/sun4v/include/kdb.h